DFT Staff Engineer- SoC Engineering

Search Jobs Find Jobs For Where? Search Jobs DFT Staff Engineer- SoC Engineering Noida, Uttar Pradesh, India Engineering Employee Apply Save Job Share • Email • LinkedIn • X • Facebook Jump to • Overview • Job Description • Benefits • Culture • How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Date posted 07/26/2026 Category Engineering Hire Type Employee Job ID 18082 Remote Eligible No Date Posted 07/26/2026 Job Title: • DFT Staff EngineerWe AreSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.You AreYou are a hands-on DFT expert who has driven test architecture and implementation for complex SoCs that tape out and succeed in production, not just in reviews. You understand how decisions made around RTL freeze impact coverage, yield, and test cost at volume, and you can confidently define the right strategy across scan/ATPG, MBIST/LBIST, and broader test hooks needed for bring-up and failure analysis.You do not just run tools. You understand the engineering tradeoffs between test time, area/power overhead, and coverage, and you can explain and defend why a specific approach is right for a given subsystem and product context. Operating with high autonomy, you own technically complex deliverables end-to-end and influence outcomes through deep expertise and strong cross-functional collaboration. When you spot untestable logic or weak test hooks, you propose practical fixes that teams actually adopt. You are comfortable leading technical discussions with architects and pushing back when decisions introduce coverage gaps or yield risk, because you have seen what happens when those issues reach production.What You'll Be Doing • Own DFT architecture, implementation, integration, and verification for complex SoCs and subsystems from specification through tapeout, working directly with customer and internal design teams • Define and execute test strategies across scan insertion and ATPG, memory BIST, logic BIST, and analog/PHY test considerations to meet coverage, quality, yield, and cost targets • Drive DFT signoff readiness by identifying testability risks early, proposing design changes, and ensuring closure across the RTL-to-GDS flow • Develop and institutionalize reusable DFT methodologies, checklists, and guidelines using Synopsys EDA tools to solve real customer problems on active service projects • Partner with silicon validation and test engineering teams on post-silicon debug, failure analysis triage, and pattern refinement to improve production outcomes • Collaborate closely with RTL design, functional verification, physical design, timing, and power teams to ensure testability is designed in from architecture through signoff • Provide technical guidance to peers through design reviews, integration/debug support, and best-practice sharingThe Impact You Will Have • Enable first-pass silicon success by surfacing and resolving DFT issues before tapeout • Improve test coverage and yield through robust scan/ATPG and BIST strategies aligned to product constraints • Reduce production test time and cost for SoCs in high-performance computing, automotive, and aerospace domains • Create reusable DFT methodologies that scale across multiple programs and customer engagements • Strengthen customer confidence by delivering DFT solutions that work in production, not just in simulation • Influence Synopsys tools and IP direction by feeding back real project learnings and customer pain points • Accelerate tapeout schedules by catching testability gaps early and proposing fixes teams can implement without reworkWhat You'll Need • Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, or related field • Typically 5+ years of hands-on SoC DFT experience with proven depth in scan/ATPG, memory BIST, logic BIST, and analog test considerations • Strong understanding of the end-to-end SoC design flow from microarchitecture through RTL, verification, synthesis, timing/physical implementation, and signoff • Demonstrated experience owning DFT implementation for complex SoCs that have taped out and gone to production • Strong working knowledge of Synopsys DFT tools such as TetraMAX, DFT Compiler, and BIST Architect is a plus • Proven ability to work cross-functionally to resolve testability issues and drive closure under schedule constraints • Post-silicon debug experience and collaboration with test engineering teams to refine production test programs is a plusWho You Are • You can quickly identify untestable logic or weak test hooks and propose practical fixes that teams will adopt • You are comfortable leading technical discussions with architects and pushing back when decisions introduce coverage gaps or yield risk • You operate with high ownership and ambiguity tolerance, able to define a path forward with incomplete information • You share expertise through hands-on collaboration, reviews, and problem-solving, not through org authority • You communicate clearly, translating DFT tradeoffs into schedule/cost/yield impact for stakeholders • You stay current with evolving DFT techniques because each new tapeout brings different constraintsThe Team You'll Be Part OfYou will join the Systems Solutions Group (SSG), a team that delivers tool, methodology, architecture, design creation, design verification, and physical implementation expertise to help leading-edge customers complete their most challenging SoC design projects. The work spans from sub-blocks to full turnkey end-to-end SoCs for customers ranging from startups to industry leaders, commercial companies, and government agencies developing SoCs for high-performance computing, automotive, aerospace and defense, and more. This is a customer-facing role where the DFT solutions you build directly enable customer tapeouts and production success.Rewards and BenefitsWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share • Email • LinkedIn • X • Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page • Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. • Time Away In addition to company holidays, we have ETO and FTO Programs. • Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. • ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. • Retirement Plans Save for your future with our retirement plans that vary by region and country. • Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys! 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