ASIC Physical Design, Staff Engineer -16723

Search Jobs Find Jobs For Where? Search Jobs ASIC Physical Design, Staff Engineer -16723 Nepean, Ontario, Canada Engineering Employee $106000-$159000 Apply Save Job Share • Email • LinkedIn • X • Facebook Jump to • Overview • Job Description • Benefits • Culture • How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Date posted 04/07/2026 Category Engineering Hire Type Employee Job ID 16723 Base Salary Range $106000-$159000 Remote Eligible No Date Posted 04/07/2026 We Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.You Are:You are an experienced ASIC Physical Design Engineer who thrives in collaborative and innovative environments. With a strong background in complex SoC and test chip implementations, you possess deep expertise in the intricacies of the physical design flow, from floor planning to tape-out. You are adept at using industry-leading tools and methodologies to achieve optimal results for area, power, and performance. Your passion for technology drives you to stay ahead of advancements in process nodes and design techniques, ensuring that every solution is robust, scalable, and silicon-proven. What You’ll Be Doing: • Contributing to physical design implementation for test chips across DDR/HBM/UCIe protocols, from RTL to final GDS release to foundry. • Developing overall floorplan and power/ground strategies tailored for diverse test chip architectures. • Owning and optimizing the RTL-to-GDSII flow, ensuring design convergence for area, power, performance, and manufacturability. • Executing and overseeing static timing analysis (STA) and physical verification (EM/IR drop, ERC/DRC/LVS, PERC/ESD analysis). • Integrating updated covercells, circuit/IP/PLL/hard-macros, and coordinating abutment checking and QA/release of hard-macros. • Driving tool flow automation and debugging to enhance productivity and design reliability. • Collaborating closely with architecture, RTL, circuit, and covercell teams throughout test chip development. • Preparing and releasing all supporting views and documentation necessary for tape-out, maintaining mask tooling forms and checklists on foundry portals.The Impact You Will Have: • Enable robust validation of Synopsys's IP blocks for PHYs, ensuring high-quality deliverables prior to customer release or SoC integration. • Accelerate time-to-market by driving rapid turnaround from RTL to silicon, reducing schedule risks and helping Synopsys meet critical market windows. • Enhance product reliability and manufacturability through rigorous timing closure, power/thermal analysis, and comprehensive verification signoff. • Bolster Synopsys's reputation by delivering high-quality, silicon-proven IP that meets real-world performance and reliability standards. • Foster seamless cross-functional collaboration, bridging architects, RTL designers, verification teams, and silicon validation groups. • Champion continuous process and tool improvement, implementing flow automation to keep Synopsys at the forefront of EDA innovation. What You’ll Need: • 6 to 7 years of experience in ASIC physical design, with a proven track record in complex SoC or test chip implementations at advanced process nodes. • Deep expertise in the complete ASIC physical design flow: floorplanning, synthesis, P&R, timing closure, IR-drop/EM analysis, LVS/DRC, etc. • Familiarity with IP integration, test chip methodology, and advanced verification flows. • Proficiency with state-of-the-art CAD tools such as Design Compiler (DC), PrimeTime (PT), IC Compiler II/FC, ICV, Calibre, RedHawk, and FinFet technologies. • Experience coordinating complex, cross-functional projects and leading technical execution. Who You Are: • Analytical thinker with strong problem-solving skills and attention to detail. • Effective communicator, able to articulate complex technical concepts to diverse stakeholders. • Collaborative team player, fostering a culture of inclusion and innovation. • Proactive leader, driving continuous improvement and embracing new technologies. • Adaptable and resilient, thriving in fast-paced, dynamic environments. • Committed to excellence and quality in every aspect of design and delivery. The Team You’ll Be A Part Of:You’ll join the Test Chip PHY development team within Synopsys’s Silicon IP business. This group is dedicated to integrating and validating Synopsys’s broad portfolio of IP blocks -logic, memory, interfaces, analog, security, and embedded processors into test chips at the forefront of semiconductor innovation. The team works collaboratively across architecture, RTL, circuit, and covercell disciplines to deliver robust, silicon-proven IP solutions that power next-generation products for global customers. Rewards and Benefits:We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com. Apply Save Job test Share • Email • LinkedIn • X • Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page • Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. • Time Away In addition to company holidays, we have ETO and FTO Programs. • Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. • ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. • Retirement Plans Save for your future with our retirement plans that vary by region and country. • Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Nepean View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys! BROWSE JOBS Find the open role that’s right for you Similar Jobs • Architect, Applications Engineering • Technical Product Management Architect – HAV AI Platform Strategy Sunnyvale, California • Validation / Verification Engineer, Sr Staff -18261 Nepean, Canada • PCIe System Architect/ Principal Engineer-18290 Sunnyvale, California Recently Viewed Jobs View all job opportunities here Saved Jobs View all job opportunities here View All Jobs Awards We're proud to receive several recognitions