Sr Principal Engineer Design, CPU Microarchitecture & RTL Design

Sr Principal Engineer Design, CPU Microarchitecture & RTL Design About GlobalFoundries GlobalFoundries (GF) is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GF makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Introduction GlobalFoundries is seeking an experienced CPU IP Design Engineer to join the MIPS processor development team. In this role, you will lead the microarchitecture definition, RTL design, and implementation of next-generation AI-enabled RISC-V CPU cores. The successful candidate will drive key architectural decisions and own critical areas of the design, balancing performance, power, area, and functionality requirements. This position offers the opportunity to contribute to industry-leading vector and matrix processing technologies that power advanced AI workloads. Your Job • Drive the microarchitecture definition and RTL design of critical blocks within advanced RISC-V CPU cores. • Lead the development of high-performance vector processing architectures and custom CPU extensions. • Design AI-enabled matrix acceleration engines integrated with vector processing subsystems. • Collaborate with architectural modeling teams to evaluate and optimize performance strategies. • Perform architectural exploration and microarchitectural research, translating concepts into detailed specifications. • Develop and refine RTL implementations to achieve performance, power, area, timing, and scalability objectives. • Define and review design features, ensuring alignment with product and system requirements. • Support functional verification activities, including verification planning, debug, and coverage analysis. • Partner with verification teams to assess and achieve performance and functional goals. • Collaborate with physical design, DFT, and implementation teams to optimize timing closure, reliability, power, and testability. • Participate in design reviews and contribute to technical direction across CPU and AI accelerator subsystems. Other Responsibilities • Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Required Qualifications • Education: Master’s degree in electrical engineering, Computer Engineering, Computer Science, or related technical discipline. PhD candidates will also be considered. • Years of Experience: 12+ years of industry experience with a master’s degree or 6+ years of industry experience with a PhD in CPU, GPU, or advanced processor design. • Hands-on experience with high-performance processors, vector processors, accelerators, or GPU architecture. • Strong understanding of data path architecture, including vector and matrix processing for floating-point and integer data types. • Deep knowledge of CPU microarchitecture in one or more of the following areas:Instruction fetch and decodeBranch predictionInstruction scheduling and register renamingReorder Buffer (ROB) designOut-of-order executionInteger and floating-point execution pipelinesLoad/store execution and memory orderingInstruction and data prefetchingVector data path architectureCache and memory subsystem design • Strong RTL design expertise using Verilog, System Verilog, and/or VHDL. • Experience with simulation, debugging, waveform analysis, and design verification methodologies. • Understanding of logic design principles and the impact of timing, power, and area tradeoffs. • Excellent analytical, problem-solving, communication, and teamwork skills. Preferred Qualifications • Experience designing RISC-V, ARM, and/or MIPS processor architectures. • Experience with hardware multithreading, virtualization, SIMD, vector, and matrix-enabled CPU designs. • Knowledge of AI acceleration techniques and processor extensions for machine learning workloads. • Strong understanding of high-performance CPU microarchitecture optimization techniques and tradeoffs. • Familiarity with low-power design and microarchitectural techniques. • Experience using scripting languages such as Python, Perl, or Tcl for design automation and analysis. • Understanding of CPU integration at the SoC level. • Experience with safety and security-focused microarchitecture features. • PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Expected Salary Range $188,000.00 - $325,000.00 The exact Salary will be determined based on qualifications, experience and location. If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address. An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations. GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory. All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law