System Performance Modeling Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE Join AMD's Pensando team and help shape the next generation of AI, cloud, and networking infrastructure technologies. In this role, you will work on advanced ASIC and SoC platforms that power high-performance computing and data center solutions. As a Senior Modeling Engineer, you will collaborate closely with architecture, design, verification, and software teams to develop system models that support architecture exploration, design validation, and software development acceleration.This is an opportunity to work at the intersection of hardware and software while influencing product development early in the design cycle. You'll be part of a highly collaborative engineering environment where your work directly impacts next-generation infrastructure technologies and helps bring innovative products to market. THE PERSON The ideal candidate is a curious and highly motivated engineer who enjoys solving complex system-level challenges and working across multiple engineering disciplines. You possess strong analytical and debugging skills, a passion for modeling and simulation, and the ability to navigate both hardware and software domains. You are comfortable collaborating with architects, designers, verification engineers, and software developers while effectively communicating technical concepts to diverse audiences. Successful candidates are proactive, detail-oriented, and thrive in a fast-paced, team-oriented environment. KEY RESPONSIBILITIES • Develop and integrate high-level, transaction-level, and cycle-accurate models for complex ASIC and SoC platforms. • Create models that support architecture exploration, ASIC verification, and software development acceleration. • Collaborate with architecture, design, verification, and software engineering teams to develop reusable validation environments. • Analyze system behavior, functionality, and performance to identify optimization opportunities. • Investigate and debug architectural, functional, and performance-related issues across hardware and software stacks. • Contribute to system-level modeling initiatives using SystemC and related simulation frameworks. • Develop automation and scripting solutions to improve modeling, simulation, and validation workflows. • Influence architecture decisions through modeling, simulation, and performance analysis. • Partner with cross-functional teams to accelerate development of next-generation AI, networking, and infrastructure technologies. PREFERRED EXPERIENCE • Strong programming experience in C++. • Experience with SystemC modeling and simulation environments. • Experience developing models for ASIC verification, architecture exploration, or software development acceleration. • Experience working with ASIC design, architecture, and verification teams. • Strong debugging and analytical skills with the ability to identify architecture, functionality, and performance issues. • Experience developing transaction-level, functional, or cycle-accurate models. • Familiarity with complex SoC architectures and system-level modeling methodologies. • Experience developing automation and scripting solutions using Python or similar languages. • Exposure to ARM Fast Models, ISA modeling, virtual platform development, or OMNeT is a plus. • Experience with networking, data center infrastructure, CPU architecture, or high-performance computing technologies is preferred. • Strong written and verbal communication skills with the ability to collaborate across multidisciplinary teams. ACADEMIC CREDENTIALS Bachelor's or master’s degree in electrical engineering, Computer Engineering, Computer Science, or a related technical discipline preferred. LOCATION: Santa Clara, CA (Hybrid) This role is not eligible for visa sponsorship. #LI-CS1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. THE ROLE Join AMD's Pensando team and help shape the next generation of AI, cloud, and networking infrastructure technologies. In this role, you will work on advanced ASIC and SoC platforms that power high-performance computing and data center solutions. As a Senior Modeling Engineer, you will collaborate closely with architecture, design, verification, and software teams to develop system models that support architecture exploration, design validation, and software development acceleration.This is an opportunity to work at the intersection of hardware and software while influencing product development early in the design cycle. You'll be part of a highly collaborative engineering environment where your work directly impacts next-generation infrastructure technologies and helps bring innovative products to market. THE PERSON The ideal candidate is a curious and highly motivated engineer who enjoys solving complex system-level challenges and working across multiple engineering disciplines. You possess strong analytical and debugging skills, a passion for modeling and simulation, and the ability to navigate both hardware and software domains. You are comfortable collaborating with architects, designers, verification engineers, and software developers while effectively communicating technical concepts to diverse audiences. Successful candidates are proactive, detail-oriented, and thrive in a fast-paced, team-oriented environment. KEY RESPONSIBILITIES • Develop and integrate high-level, transaction-level, and cycle-accurate models for complex ASIC and SoC platforms. • Create models that support architecture exploration, ASIC verification, and software development acceleration. • Collaborate with architecture, design, verification, and software engineering teams to develop reusable validation environments. • Analyze system behavior, functionality, and performance to identify optimization opportunities. • Investigate and debug architectural, functional, and performance-related issues across hardware and software stacks. • Contribute to system-level modeling initiatives using SystemC and related simulation frameworks. • Develop automation and scripting solutions to improve modeling, simulation, and validation workflows. • Influence architecture decisions through modeling, simulation, and performance analysis. • Partner with cross-functional teams to accelerate development of next-generation AI, networking, and infrastructure technologies. PREFERRED EXPERIENCE • Strong programming experience in C++. • Experience with SystemC modeling and simulation environments. • Experience developing models for ASIC verification, architecture exploration, or software development acceleration. • Experience working with ASIC design, architecture, and verification teams. • Strong debugging and analytical skills with the ability to identify architecture, functionality, and performance issues. • Experience developing transaction-level, functional, or cycle-accurate models. • Familiarity with complex SoC architectures and system-level modeling methodologies. • Experience developing automation and scripting solutions using Python or similar languages. • Exposure to ARM Fast Models, ISA modeling, virtual platform development, or OMNeT is a plus. • Experience with networking, data center infrastructure, CPU architecture, or high-performance computing technologies is preferred. • Strong written and verbal communication skills with the ability to collaborate across multidisciplinary teams. ACADEMIC CREDENTIALS Bachelor's or master’s degree in electrical engineering, Computer Engineering, Computer Science, or a related technical discipline preferred. LOCATION: Santa Clara, CA (Hybrid) This role is not eligible for visa sponsorship. #LI-CS1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.