On-chip thermometry at millikelvin temperatures for quantum-classical electronics co-integration
Master internship - LeuvenPosted May 24, 2026via generic-json
Quantum
computing has the potential to revolutionize information processing by
performing computations beyond the reach of classical computers. This will
require the operation of quantum processors containing millions of extremely
sensitive qubits, located inside dilution refrigerators and operated at temperatures
near 10 millikelvin. Current experimental systems, however, are limited to only
a few hundred qubits. This is due in part to the input-output bottleneck, which
greatly limits qubit control at scale. Cryogenic CMOS
circuits, closely integrated with quantum circuits, have been proposed as a
solution to alleviate this input-output bottleneck and allow for the operation
of large-scale quantum processors [1]. Achieving this is especially
challenging, due to the extremely stringent thermal and noise requirements of
quantum bits and of the cryogenic environment. Accurate temperature sensing is
therefore critical for the characterization, validation and optimization of such
chips at deep cryogenic temperatures. However, conventional temperature sensors
often lack the required sensitivity or resolution and cannot be directly
integrated on CMOS chips for characterization. In this Master
thesis, you will investigate CMOS-compatible on-chip thermometry techniques
suitable for millikelvin temperatures, with a focus on semiconductor devices
such as diodes or bipolar junction transistors (BJTs) [2]. This work will consist
of cryogenic electrical measurements in a dilution refrigerator, performed at
temperatures down to 10 mK. It could include the development of calibration and
measurement protocols for the accurate extraction of the local temperature at
different areas of a chip. The thesis aims to quantify the impact of cryogenic
circuits operating in different modes on the local temperature, both within and
outside the chip, and to assess the relevance of thermal effects for closer
integration with quantum processors. Required
background: Electrical engineering, Physics Type of work: 20%
literature, 40% measurements and experiments, 40% data analysis Promotor: Bart
Soree Daily advisors: Liam
Fallik, Anton Potočnik References: [1] Potočnik, A. How to scale the
electronic control systems of a quantum computer. Nat Electron 8, 3–4 (2025). https://doi.org/10.1038/s41928-024-01331-9 [2] Grayson
M. Noah et. al. CMOS on-chip thermometry at deep
cryogenic temperatures. Appl. Phys. Rev. 11, 021414 (2024). https://doi.org/10.1063/5.0190040 Type of internship : Master internship Duration : 9 months (Oct-June) Required educational background : Nanoscience & Nanotechnology, Electrotechnics/Electrical Engineering, Physics University promotor : Bart Soree (KU Leuven) Supervising scientist(s) : For further information or for application, please contact Liam Fallik ( Liam.Fallik@imec.be ) and Anton Potocnik ( Anton.Potocnik@imec.be ) The reference code for this position is 2026-INT-103 . Mention this reference code in your application. Only for self-supporting students. Applications should include the following information: resume motivation current study Incomplete applications will not be considered