Staff Interface IP Verification Engineer (Pre-Silicon)

Search Jobs Find Jobs For Where? Search Jobs Staff Interface IP Verification Engineer (Pre-Silicon) Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share • Email • LinkedIn • X • Facebook Jump to • Overview • Job Description • Benefits • Culture • How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Date posted 08/23/2026 Category Engineering Hire Type Employee Job ID 18379 Remote Eligible No Date Posted 08/23/2026 Staff Interface IP Verification Engineer (Pre-Silicon)We AreSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.You AreYou have spent years verifying silicon that has to actually work, not just pass regression, actually work, in production systems where a protocol violation or a corner case bug can cost a customer months of schedule and millions in respins. You know that the difference between IP that ships clean and IP that comes back with errata is usually a testbench decision made six months earlier, and you are the kind of engineer who catches that gap before tapeout.You are comfortable moving between PCIe link training sequences, CXL cache coherency protocols, and DDR timing constraints without losing sight of what you are actually building: reusable verification environments that have to scale across product families and customer use cases. You do not need a perfect spec to get started. You read between the lines, ask the right questions of architects, and build coverage models that reflect real-world integration scenarios, not just checklist compliance.Debugging energizes you. Not because it is heroic, but because finding the root cause of a multi-layer protocol issue and fixing it upstream makes the difference for every team that integrates your IP downstream. You have opinions on what good UVM architecture looks like, and you are not afraid to push back when a verification plan misses the actual risk.At Synopsys, you will work on Interface IP that powers AI accelerators, data centers, and next-generation SoCs used by the world's leading semiconductor companies. The team is global, the protocols are real, and what you verify will matter.What You'll Be Doing • Own end-to-end verification of complex Interface IP including PCIe, CXL, DDR, and Ethernet, from architecture review through signoff and customer release • Architect and build scalable UVM-based verification environments and reusable verification IP components that work across multiple product variants and customer configurations • Define verification strategies and detailed test plans by analyzing specifications, identifying protocol corner cases, and mapping coverage goals to real integration risks • Develop constrained-random, coverage-driven testbenches using SystemVerilog and UVM, with a focus on protocol compliance, performance validation, and system-level interaction scenarios • Drive functional coverage closure by analyzing gaps, writing targeted tests, and working with design teams to ensure all architectural intent is verified before tapeout • Debug complex RTL, protocol, and system-level issues across simulators like VCS or ModelSim, using waveform analysis, assertions, and protocol monitors to isolate root cause • Mentor verification engineers on UVM methodology, coverage techniques, and debugging approaches while contributing to verification infrastructure and process improvements across the teamThe Impact You Will Have • Your verification work will directly determine the quality and reliability of Interface IP integrated into AI platforms, hyperscale data centers, and high-performance computing systems used worldwide • You will reduce customer-found bugs and post-silicon errata by catching protocol violations, timing issues, and integration corner cases during pre-silicon verification • Your reusable verification IP and testbench architectures will accelerate verification timelines for future product generations and reduce bring-up time for derivative designs • You will influence verification methodology and best practices across the Interface IP engineering organization, raising the bar for coverage rigor and automation efficiency • Your coverage models and test strategies will become the reference standard for how complex protocols like PCIe Gen6, CXL 3.0, and DDR5 are verified at Synopsys • You will help develop the next generation of verification engineers by sharing expertise in protocol verification, UVM architecture, and systematic debugging techniques • Your technical leadership will drive successful product releases that meet the quality expectations of the world's most demanding semiconductor customersWhat You'll Need • Bachelor's or Master's in Electrical Engineering or Computer Engineering with at least 5 years of hands-on ASIC or SoC verification experience • Deep expertise in SystemVerilog and UVM methodologies, including building constrained-random testbenches, functional coverage models, and reusable verification components • Strong protocol knowledge in one or more of PCIe, CXL, DDR memory interfaces, or Ethernet, with demonstrated experience verifying protocol compliance and system-level interactions • Proven experience developing coverage-driven verification environments and driving coverage closure on complex designs through tapeout • Strong debugging skills across RTL, verification infrastructure, and protocol layers, with experience using industry-standard simulators such as VCS, ModelSim, Xcelium, or Questa • Experience with verification IP development, assertion-based verification, or formal methodologies is a strong plus • Knowledge of modern SoC architectures, high-speed SerDes interfaces, or cache coherency protocols is a plusWho You Are • You can walk into a spec review, spot the ambiguities that will become verification holes three months later, and ask the questions that force clarity before RTL is written • You write UVM code that other engineers can actually read and extend, you care about class hierarchy, encapsulation, and making your testbench maintainable for the team that inherits it • You do not declare victory when regression passes, you dig into coverage reports, find the scenarios you are not hitting, and write the tests that close the gaps before someone else finds them in silicon • You can explain a complex protocol deadlock scenario to a design engineer in two sentences without losing the technical nuance, and you know when to escalate an issue versus when to debug it yourself • You work effectively across global teams and time zones, keeping verification plans aligned with architecture, design, and customer timelines without waiting for perfect information • You mentor junior engineers by showing them how to think about verification strategy, not just how to write a test, and you make the team around you betterThe Team You'll Be Part OfYou will join a team of highly skilled verification engineers responsible for developing and verifying industry-leading Interface IP solutions. Working alongside experts in architecture, design, and verification, you will tackle some of the semiconductor industry's most challenging technical problems while contributing to products deployed worldwide.Rewards and BenefitsWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share • Email • LinkedIn • X • Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page • Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. • Time Away In addition to company holidays, we have ETO and FTO Programs. • Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. • ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. • Retirement Plans Save for your future with our retirement plans that vary by region and country. • Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys! 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