Lead/Sr. Manager CPU verification engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. SMTS SILICON DESIGN ENGINEER CPU verification engineer role - Core Verification Engineer The AMD Cores design & verification group develops high-end, next generation CPU’s that power different AMD SoC’s which are eventually set to change the course of how computing is visualized. The engineering teams are distributed across US and India. The CPU verification team in India is one of AMD India’s first teams & involved in contributing to the tape out of numerous AMD systems. As part of the CPU Design Verification team, our team will be responsible for the maintainability & scalability of RTL & testbench environment that is used for development & verification of the design. As always, the team is dedicated to come up with innovative solution to overcome new challenges related to specific project requirements and time-to-market. KEY RESPONSIBILITIES • Will work with different stake holders in getting a thorough understanding of high-level feature/s & get clarification(if any). Also evaluate cross-feature dependencies. • After feature understanding, populate high level testplan that details out how we plan(Stimulus, debug, coverage) to verify the feature & what we cover/don’t cover as a part of the feature verification. Get it reviewed & incorporate feedback. • Develop directed/random test cases to target the feature bringup. Debug fails(debug needs an understanding of computer architecture, micro-architecture & TB environment), file RTL/Verif bugs, fix testbench issues. • Ensure feature health is stable & in parallel work on evaluating stimulus coverage. If needed, tweak/add stimulus as appropriate. • If the feature demands, develop new C++ checkers. All this while learning & understanding uarch is an integral part. • Work on ensuring 100% FCOV that might involve developing new stimulus. Also, it might demand working with other feature owners to close on cross-feature coverage. • On a need basis, work on Post-Si bug recreation. SKILLS AND EXPERIENCE REQUIREMENTS • B.E/B.Tech/M.E/M.Tech in Computer Science/Electrical/Electronic Engineering. • 14+ years of experience in CPU verification. • Good understanding about basics of computer architecture & digital systems • Understanding of assembly(x86) code. • Good understanding of Verilog, System Verilog, C++. Knowledge of shell/perl scripting is a plus. • Understanding of Formal Verification methodology (with tools VSI-FV/JASPER/IFV/IEV) is a plus. • Should be a good team player, quick thinker, pro-active, adaptable & outspoken/approachable. • Must communicate well both written and orally. • Must have led teams of few • Must be well-organized and should be able to multitask well with due diligence on closing his/her tasks. Additional KEY RESPONSIBILITIES (Leadership & Team Management) • Provide technical leadership and mentorship to a team of verification engineers, guiding feature bring-up, debug methodologies, and verification best practices. • Drive verification planning and execution across multiple features/projects, ensuring alignment with program milestones, quality goals, and tapeout schedules. • Lead technical reviews for test plans, verification environments, coverage closure strategies, and debug approaches to improve overall verification quality. • Coordinate across global teams (Architecture, Design, DV, Emulation, Post-Si, and Program Management) to resolve technical challenges and execution risks. • Identify verification gaps, project risks, and resource constraints proactively, and drive mitigation plans to ensure successful project execution. • Champion process improvements, automation initiatives, and adoption of new verification methodologies to improve team productivity and verification effectiveness. • Drive knowledge sharing within the team through technical trainings, design reviews, and mentoring sessions. • Provide technical direction during critical debug activities and help unblock engineers working on complex micro-architectural issues. • Participate in hiring, onboarding, and development of verification engineers, helping build a high-performing verification team. • Foster a culture of collaboration, accountability, innovation, and engineering excellence across geographically distributed teams.Additional SKILLS AND EXPERIENCE REQUIREMENTS • Demonstrated experience in leading verification teams and driving execution of complex CPU verification projects. • Strong technical leadership skills with the ability to mentor junior and senior engineers and influence technical decisions across teams. • Proven track record of successfully delivering verification milestones for large-scale CPU/SoC programs. • Excellent stakeholder management skills with experience collaborating with Architecture, RTL Design, Firmware, Post-Silicon, and Program Management teams. • Strong project planning, prioritization, and execution skills with the ability to manage multiple deliverables in a fast-paced environment. • Experience driving verification methodology improvements, automation initiatives, and productivity enhancements. • Ability to effectively communicate technical concepts and project status to both technical and management audiences. • Experience participating in hiring, performance coaching, and career development of engineering team members is highly desirable. WHAT YOU WILL LEARN You will gain valuable experience in different aspects of CPU design & verification. You will also be familiarized with the nuances & challenges associated in design/verification of high-performance, pipelined CPU architecture. This helps you gain valuable insight & enhance your understanding of CPU micro-architecture. This team is essential to the success of AMD as a growing company. It is a very exciting environment, and you will be working with the very best in our technology. You will be working on some of the most exciting projects the industry has to offer. #LI-BM2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. SMTS SILICON DESIGN ENGINEER CPU verification engineer role - Core Verification Engineer The AMD Cores design & verification group develops high-end, next generation CPU’s that power different AMD SoC’s which are eventually set to change the course of how computing is visualized. The engineering teams are distributed across US and India. The CPU verification team in India is one of AMD India’s first teams & involved in contributing to the tape out of numerous AMD systems. As part of the CPU Design Verification team, our team will be responsible for the maintainability & scalability of RTL & testbench environment that is used for development & verification of the design. As always, the team is dedicated to come up with innovative solution to overcome new challenges related to specific project requirements and time-to-market. KEY RESPONSIBILITIES • Will work with different stake holders in getting a thorough understanding of high-level feature/s & get clarification(if any). Also evaluate cross-feature dependencies. • After feature understanding, populate high level testplan that details out how we plan(Stimulus, debug, coverage) to verify the feature & what we cover/don’t cover as a part of the feature verification. Get it reviewed & incorporate feedback. • Develop directed/random test cases to target the feature bringup. Debug fails(debug needs an understanding of computer architecture, micro-architecture & TB environment), file RTL/Verif bugs, fix testbench issues. • Ensure feature health is stable & in parallel work on evaluating stimulus coverage. If needed, tweak/add stimulus as appropriate. • If the feature demands, develop new C++ checkers. All this while learning & understanding uarch is an integral part. • Work on ensuring 100% FCOV that might involve developing new stimulus. Also, it might demand working with other feature owners to close on cross-feature coverage. • On a need basis, work on Post-Si bug recreation. SKILLS AND EXPERIENCE REQUIREMENTS • B.E/B.Tech/M.E/M.Tech in Computer Science/Electrical/Electronic Engineering. • 14+ years of experience in CPU verification. • Good understanding about basics of computer architecture & digital systems • Understanding of assembly(x86) code. • Good understanding of Verilog, System Verilog, C++. Knowledge of shell/perl scripting is a plus. • Understanding of Formal Verification methodology (with tools VSI-FV/JASPER/IFV/IEV) is a plus. • Should be a good team player, quick thinker, pro-active, adaptable & outspoken/approachable. • Must communicate well both written and orally. • Must have led teams of few • Must be well-organized and should be able to multitask well with due diligence on closing his/her tasks. Additional KEY RESPONSIBILITIES (Leadership & Team Management) • Provide technical leadership and mentorship to a team of verification engineers, guiding feature bring-up, debug methodologies, and verification best practices. • Drive verification planning and execution across multiple features/projects, ensuring alignment with program milestones, quality goals, and tapeout schedules. • Lead technical reviews for test plans, verification environments, coverage closure strategies, and debug approaches to improve overall verification quality. • Coordinate across global teams (Architecture, Design, DV, Emulation, Post-Si, and Program Management) to resolve technical challenges and execution risks. • Identify verification gaps, project risks, and resource constraints proactively, and drive mitigation plans to ensure successful project execution. • Champion process improvements, automation initiatives, and adoption of new verification methodologies to improve team productivity and verification effectiveness. • Drive knowledge sharing within the team through technical trainings, design reviews, and mentoring sessions. • Provide technical direction during critical debug activities and help unblock engineers working on complex micro-architectural issues. • Participate in hiring, onboarding, and development of verification engineers, helping build a high-performing verification team. • Foster a culture of collaboration, accountability, innovation, and engineering excellence across geographically distributed teams.Additional SKILLS AND EXPERIENCE REQUIREMENTS • Demonstrated experience in leading verification teams and driving execution of complex CPU verification projects. • Strong technical leadership skills with the ability to mentor junior and senior engineers and influence technical decisions across teams. • Proven track record of successfully delivering verification milestones for large-scale CPU/SoC programs. • Excellent stakeholder management skills with experience collaborating with Architecture, RTL Design, Firmware, Post-Silicon, and Program Management teams. • Strong project planning, prioritization, and execution skills with the ability to manage multiple deliverables in a fast-paced environment. • Experience driving verification methodology improvements, automation initiatives, and productivity enhancements. • Ability to effectively communicate technical concepts and project status to both technical and management audiences. • Experience participating in hiring, performance coaching, and career development of engineering team members is highly desirable. WHAT YOU WILL LEARN You will gain valuable experience in different aspects of CPU design & verification. You will also be familiarized with the nuances & challenges associated in design/verification of high-performance, pipelined CPU architecture. This helps you gain valuable insight & enhance your understanding of CPU micro-architecture. This team is essential to the success of AMD as a growing company. It is a very exciting environment, and you will be working with the very best in our technology. You will be working on some of the most exciting projects the industry has to offer. #LI-BM2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.