Staff Digital Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. The AMD SerDes team in Ireland are hiring for a Staff level digital design engineer to work on the development of digital designs for complex mixed-signal ICs in the latest CMOS FinFET processes. The scope of the work includes the RTL design and implementation of complex clock and data recovery algorithms, adaptive digitally assisted control loops and the development of advanced DSP designs to achieve power efficient channel equalization solutions. The successful candidate will work with an experienced mixed signal design team delivering world-class SerDes solutions.   Day to day responsibilities:  • RTL implementation of algorithms for clock and data recovery, adaptive digital control and DSP. • Communication with the architecture team to understand proposed algorithms and provide feedback regarding design implementation. • Digital design verification to ensure basic design functionality prior to hand-off of the design to verification team • Design verification using standard industry tools for HDL checking e.g. CDC, RDC, Lint • Support of the verification team in the debug of identified issues • Assist with silicon bring up and debug. • Creation of clear design specifications and implementation documentation.   Preferred Experience:  • Extensive experience in RTL design methodologies, specification development and design implementation. • Familiarity with RTL design using a HDL such as Verilog or VHDL, Verilog being a preference. • Experience in modern digital ASIC methodologies including verification, STA and signal integrity, DFT, synthesis, physical implementation. • "Tape-out” experience in advanced foundry process technologies • Experience in silicon debug, verification and characterization • Excellent written and oral communication skills • Good interpersonal/teamwork skills   Academic Credentials:  Bachelors Degree or Masters Degree in Electrical Engineering #LI-PL1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. The AMD SerDes team in Ireland are hiring for a Staff level digital design engineer to work on the development of digital designs for complex mixed-signal ICs in the latest CMOS FinFET processes. The scope of the work includes the RTL design and implementation of complex clock and data recovery algorithms, adaptive digitally assisted control loops and the development of advanced DSP designs to achieve power efficient channel equalization solutions. The successful candidate will work with an experienced mixed signal design team delivering world-class SerDes solutions.   Day to day responsibilities:  • RTL implementation of algorithms for clock and data recovery, adaptive digital control and DSP. • Communication with the architecture team to understand proposed algorithms and provide feedback regarding design implementation. • Digital design verification to ensure basic design functionality prior to hand-off of the design to verification team • Design verification using standard industry tools for HDL checking e.g. CDC, RDC, Lint • Support of the verification team in the debug of identified issues • Assist with silicon bring up and debug. • Creation of clear design specifications and implementation documentation.   Preferred Experience:  • Extensive experience in RTL design methodologies, specification development and design implementation. • Familiarity with RTL design using a HDL such as Verilog or VHDL, Verilog being a preference. • Experience in modern digital ASIC methodologies including verification, STA and signal integrity, DFT, synthesis, physical implementation. • "Tape-out” experience in advanced foundry process technologies • Experience in silicon debug, verification and characterization • Excellent written and oral communication skills • Good interpersonal/teamwork skills   Academic Credentials:  Bachelors Degree or Masters Degree in Electrical Engineering #LI-PL1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.