Sr. Manager, Memory Systems Engineering

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. THE ROLE:  As a Senior Manager, System Memory Validation Engineering, you will lead a team responsible for ensuring the performance, reliability, and quality of AMD's next-generation memory solutions. You will drive system memory validation strategy from pre-silicon development through customer deployment, working closely with architecture, silicon design, firmware, BIOS, and validation teams. This role combines deep technical leadership, cross-functional collaboration, and people management to enable industry-leading server, AI, and high-performance computing platforms. THE PERSON:  The successful candidate is a seasoned engineering leader with deep system memory expertise and a demonstrated ability to lead teams through complex validation, bring-up, and product enablement challenges. They combine strong technical depth across hardware, firmware, and system software with exceptional leadership, strategic thinking, and a commitment to developing talent and delivering customer success. KEY RESPONSIBILITIES: • Lead a hardworking distributed team passionate about delivering robust technical solutions including pre-silicon and post-silicon work. • Own the team to innovate methods for pre-silicon memory validation and efficiencies for post silicon memory bring up, feature enablement, optimization, and validation. • Lead system memory validation strategy from pre-silicon through customer adoption working across architecture, silicon design, firmware, validation, and debug teams. • Proactively leading project planning, developing, and maintaining schedules, managing dependencies, and ensuring quality of work you are doing at committed landmarks. • Working directly with our customers to ensure their memory solutions meet industry best requirements. • Drive debug and resolution of system memory issues across silicon, firmware/BIOS, and coordinating with memory partners as needed. • Drive communication of program status, key milestones, risks, and deliverables to senior leadership and cross-functional stakeholders. • Build and develop a high-performing team through coaching, mentorship, and technical leadership. PREFERRED EXPERIENCE: • Expertise in system memory technologies, including DDR, LPDDR, HBM, and memory subsystem architecture. • Strong experience with pre-silicon and post-silicon memory validation, bring-up, debug, and performance optimization. • Deep understanding of firmware, BIOS/UEFI, and system software interactions with memory subsystems. • Engineering leadership experience managing teams and driving cross-functional execution across hardware and software organizations. • Excellent communication skills with the ability to influence technical and business stakeholders. ACADEMIC CREDENTIALS: • Bachelor’s or Master’s degree in related discipline preferred This role is not eligible for visa sponsorship. #LI-EV1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. THE ROLE:  As a Senior Manager, System Memory Validation Engineering, you will lead a team responsible for ensuring the performance, reliability, and quality of AMD's next-generation memory solutions. You will drive system memory validation strategy from pre-silicon development through customer deployment, working closely with architecture, silicon design, firmware, BIOS, and validation teams. This role combines deep technical leadership, cross-functional collaboration, and people management to enable industry-leading server, AI, and high-performance computing platforms. THE PERSON:  The successful candidate is a seasoned engineering leader with deep system memory expertise and a demonstrated ability to lead teams through complex validation, bring-up, and product enablement challenges. They combine strong technical depth across hardware, firmware, and system software with exceptional leadership, strategic thinking, and a commitment to developing talent and delivering customer success. KEY RESPONSIBILITIES: • Lead a hardworking distributed team passionate about delivering robust technical solutions including pre-silicon and post-silicon work. • Own the team to innovate methods for pre-silicon memory validation and efficiencies for post silicon memory bring up, feature enablement, optimization, and validation. • Lead system memory validation strategy from pre-silicon through customer adoption working across architecture, silicon design, firmware, validation, and debug teams. • Proactively leading project planning, developing, and maintaining schedules, managing dependencies, and ensuring quality of work you are doing at committed landmarks. • Working directly with our customers to ensure their memory solutions meet industry best requirements. • Drive debug and resolution of system memory issues across silicon, firmware/BIOS, and coordinating with memory partners as needed. • Drive communication of program status, key milestones, risks, and deliverables to senior leadership and cross-functional stakeholders. • Build and develop a high-performing team through coaching, mentorship, and technical leadership. PREFERRED EXPERIENCE: • Expertise in system memory technologies, including DDR, LPDDR, HBM, and memory subsystem architecture. • Strong experience with pre-silicon and post-silicon memory validation, bring-up, debug, and performance optimization. • Deep understanding of firmware, BIOS/UEFI, and system software interactions with memory subsystems. • Engineering leadership experience managing teams and driving cross-functional execution across hardware and software organizations. • Excellent communication skills with the ability to influence technical and business stakeholders. ACADEMIC CREDENTIALS: • Bachelor’s or Master’s degree in related discipline preferred This role is not eligible for visa sponsorship. #LI-EV1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.