Memory Layout Design Engineer, Staff

Search Jobs Find Jobs For Where? Search Jobs Memory Layout Design Engineer, Staff Noida, Uttar Pradesh, India Engineering Employee Apply Save Job Share • Email • LinkedIn • X • Facebook Jump to • Overview • Job Description • Benefits • Culture • How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Date posted 07/13/2026 Category Engineering Hire Type Employee Job ID 17875 Remote Eligible No Date Posted 07/13/2026 Memory Layout Design Engineer, StaffWe AreSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.You AreYou have spent years deep in the details of custom memory layout, and you know that the difference between a memory compiler that ships and one that stalls out is usually in how you handled density, matching, and DRC closure three weeks before tape-out. You think in layers, in device symmetry, in parasitic trade-offs. When a circuit designer hands you a schematic, you see not just what they drew but what they meant, and you know how to translate that intent into a layout that works across process corners and actually manufactures.You do not wait for someone to tell you the DRC is broken. You catch it, you debug it, and you drive the fix. You have migrated designs across technology nodes and lived through the surprises that come with FinFET scaling. You can sit with a junior engineer and explain why their routing choice will create an antenna violation, and you can sit with a methodology team and push back when an automation script does not account for real layout constraints.At Synopsys, you will work on memory IP that powers chips across the industry. The work is technical, the problems are real, and what you design will ship.What You'll Be Doing • Design and own custom layouts for SRAM, Register Files, ROM, and related memory compiler IP blocks from floorplan through final signoff • Execute and close DRC, LVS, ERC, antenna, density, and reliability checks using Virtuoso and physical verification tools • Drive technology node migrations for memory compilers, resolving layout and verification issues that emerge with new process rules • Collaborate directly with circuit designers to ensure schematic-layout correlation, device matching, symmetry, and design intent are preserved • Develop and refine layout methodologies, automation scripts in Tcl, Perl, or Python, and best practices that improve team efficiency and design quality • Review layouts created by junior engineers, provide technical guidance, and mentor on complex layout challenges • Support customer-specific memory customization projects, working through optimization requests and delivering production-ready IPThe Impact You Will Have • Your layouts will directly enable memory IP that ships in high-volume semiconductor products across automotive, mobile, AI, and data center applications • You will reduce design cycle time by improving layout automation and methodology, allowing the team to take on more projects with higher quality • Your ability to close complex DRC and LVS issues independently will unblock project milestones and keep compiler development on schedule • You will raise the technical bar for the team by mentoring junior designers and establishing layout standards that scale across technology nodes • Your collaboration with circuit and CAD teams will surface layout-driven insights that influence architecture and tool development decisions • You will help Synopsys deliver memory IP that meets the most demanding area, performance, power, and reliability requirements from leading semiconductor companies • Your work on technology migrations will position the memory IP portfolio for next-generation nodes and maintain Synopsys leadership in the marketWhat You'll Need • Bachelor's or Master's degree in Electronics, VLSI, Microelectronics, or a related technical field • 8 to 10 years of hands-on experience in custom memory layout design, specifically SRAM, Register Files, ROM, or memory compiler development • Strong proficiency with custom layout tools such as Cadence Virtuoso or equivalent platforms • Demonstrated expertise in DRC/LVS closure, device matching and symmetry, and analog/custom layout techniques • Deep understanding of CMOS layout fundamentals, memory architecture, and FinFET technology nodes • Experience with parasitic extraction and physical verification flows, and the ability to interpret and act on results • Familiarity with scripting in Tcl, Perl, or Python for layout automation is a strong plusWho You Are • You can debug a complex LVS mismatch by tracing through netlists, schematics, and layout views without needing someone to walk you through it • You know when to optimize for area and when to prioritize matching or performance, and you can explain the trade-off to a circuit designer in a way that moves the decision forward • You review a junior engineer's layout and give feedback that is specific, actionable, and grounded in what will actually cause problems downstream • You work across teams with circuit designers, methodology engineers, and CAD without losing sight of what you are trying to deliver or when it needs to be done • You stay current on process technology changes and layout challenges that come with new nodes, and you bring that knowledge into your daily work • You take ownership of your projects and deliver milestones with limited supervision, raising issues early when dependencies or risks emergeThe Team You'll Be Part OfYour recruiter will share more about the team structure and mission during the interview process.Rewards and BenefitsWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share • Email • LinkedIn • X • Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page • Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. • Time Away In addition to company holidays, we have ETO and FTO Programs. • Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. • ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. • Retirement Plans Save for your future with our retirement plans that vary by region and country. • Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys! 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