Data Accelerator - RTL Design Engineer – Lead

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: The Data Accelerator (DACC) team at AMD is seeking a Silicon Design Engineer to lead a talented front-end IP design team. This role is an excellent opportunity to work on next generation technologies that are part of AMD’s products powering Servers, Datacenters, Client and Embedded markets. You will join one of the fastest-growing areas of adding custom hardware offload engines to support complex operations like encryption, authentication, compression, GPU/CPU compute offloads & virtual machines live migration. This is a tremendous opportunity to get in early into the rapidly expanding domain of custom hardware accelerators. Our management fosters and encourages continuous technical innovation to showcase success as well as continuous career development. THE PERSON: A successful candidate will have a strong ASIC design background who has led or participated in several silicon design projects with increasing responsibilities. The candidate will also have a demonstrated history of achieving results through effective execution, problem-solving skills and excellent communication. KEY RESPONSIBLITIES: • Own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. • Collaborate with architecture teams to understand the requirements. • Lead and mentor other design engineers to achieve project goals and organizational growth. • Work with verification, implementation and physical design teams to achieve high quality design and successful tape outs. • Contribute in cross-functional teams to solve novel problems across multiple areas in development of required features. • Support post silicon team to ensure successful bring up • Effectively communicate with multi-disciplinary teams across the globe • Attend and present in status meetings on a weekly/bi-weekly basis PREFERRED EXPERIENCE: • Proven track record of ASIC design on production tape-outs. • Experience in designing IP blocks for an SOC. • Experience with industry-standard simulation and static analysis tools • Experience with synthesis, static timing analysis & timing / power optimizations. • Experience with automation using scripting techniques such as PERL, Python or Tcl • Familiarity with using AI for design a plus • Ability to develop clear and concise engineering documentation. • Strong verbal and written communication skills. • Exhibit strong ownership of tasks and responsibilities. ACADEMIC CREDENTIALS: • Bachelors or Masters (preferred) degree in Computer Engineering/Electrical Engineering LOCATION: Markham, ON #LI-SL3 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. THE ROLE: The Data Accelerator (DACC) team at AMD is seeking a Silicon Design Engineer to lead a talented front-end IP design team. This role is an excellent opportunity to work on next generation technologies that are part of AMD’s products powering Servers, Datacenters, Client and Embedded markets. You will join one of the fastest-growing areas of adding custom hardware offload engines to support complex operations like encryption, authentication, compression, GPU/CPU compute offloads & virtual machines live migration. This is a tremendous opportunity to get in early into the rapidly expanding domain of custom hardware accelerators. Our management fosters and encourages continuous technical innovation to showcase success as well as continuous career development. THE PERSON: A successful candidate will have a strong ASIC design background who has led or participated in several silicon design projects with increasing responsibilities. The candidate will also have a demonstrated history of achieving results through effective execution, problem-solving skills and excellent communication. KEY RESPONSIBLITIES: • Own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. • Collaborate with architecture teams to understand the requirements. • Lead and mentor other design engineers to achieve project goals and organizational growth. • Work with verification, implementation and physical design teams to achieve high quality design and successful tape outs. • Contribute in cross-functional teams to solve novel problems across multiple areas in development of required features. • Support post silicon team to ensure successful bring up • Effectively communicate with multi-disciplinary teams across the globe • Attend and present in status meetings on a weekly/bi-weekly basis PREFERRED EXPERIENCE: • Proven track record of ASIC design on production tape-outs. • Experience in designing IP blocks for an SOC. • Experience with industry-standard simulation and static analysis tools • Experience with synthesis, static timing analysis & timing / power optimizations. • Experience with automation using scripting techniques such as PERL, Python or Tcl • Familiarity with using AI for design a plus • Ability to develop clear and concise engineering documentation. • Strong verbal and written communication skills. • Exhibit strong ownership of tasks and responsibilities. ACADEMIC CREDENTIALS: • Bachelors or Masters (preferred) degree in Computer Engineering/Electrical Engineering LOCATION: Markham, ON #LI-SL3 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.