Layout Design, Sr Staff Engineer

Search Jobs Find Jobs For Where? Search Jobs Layout Design, Sr Staff Engineer Noida, Uttar Pradesh, India Engineering Employee Apply Save Job Share • Email • LinkedIn • X • Facebook Jump to • Overview • Job Description • Benefits • Culture • How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Date posted 08/19/2026 Category Engineering Hire Type Employee Job ID 18420 Remote Eligible No Date Posted 08/19/2026 We AreSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.You AreYou have spent a decade or more in the trenches of memory layout, and you know that the difference between a memory that ships in millions of devices and one that dies in characterization is often a decision about routing, spacing, or symmetry made months before tapeout. You are the engineer who catches those decisions early, the one circuit designers trust to tell them what will actually work in silicon versus what looks good in a schematic.You have built SRAM bit-cells at 5nm, debugged LVS mismatches that stumped entire teams, and optimized array structures for both density and yield in ways that became the template for future projects. When a foundry changes a design rule three weeks before signoff, you do not panic. You assess the impact, propose solutions, and keep the project moving.Leading comes naturally to you, not because you seek authority but because people know you will give them the real answer, the technical tradeoff, the path that actually works. You mentor by doing, by showing engineers how to think through a problem, not just how to fix it. At this point in your career, you are shaping not just layouts but methodologies, automation strategies, and the technical direction of entire product lines.At Synopsys, you will work on memory IP that powers AI accelerators, automotive SoCs, and next-generation data centers. The problems are hard, the stakes are real, and the team expects you to lead.What You'll Be Doing • Lead complete physical layout development for advanced memory IP including SRAM, ROM, eDRAM, and emerging memory types across nodes from 3nm to mature technologies • Drive layout architecture decisions at every level: bit-cell topology, array organization, peripheral circuits, power distribution, and full memory integration • Define and implement layout methodologies that improve area efficiency, performance, power consumption, and manufacturability while meeting aggressive yield targets • Resolve complex DRC, LVS, ERC, and EMIR issues in dense memory structures, ensuring first-pass silicon success and working directly with foundry teams when rules or models need clarification • Lead RC extraction, parasitic analysis, and signal integrity optimization efforts, collaborating with circuit designers to close timing, power, and reliability on critical paths • Develop layout automation, generators, validation flows, and productivity tools using scripting languages to accelerate execution and improve design quality • Mentor staff and senior layout engineers across multiple projects and sites, providing technical guidance, reviewing critical design decisions, and supporting career developmentThe Impact You Will Have • Shape memory IP strategies that directly influence product competitiveness in AI, HPC, automotive, mobile, and cloud markets where performance and power define success • Establish layout methodologies and best practices used across Synopsys memory product families and development sites, raising the bar for execution quality • Accelerate project schedules by driving automation, process improvements, and reusable design frameworks that reduce iteration cycles and manual effort • Reduce technical and schedule risk by identifying and mitigating critical layout challenges early, before they become tapeout blockers or silicon respins • Improve yield and manufacturability through layout techniques, design-for-manufacturing practices, and close collaboration with process technology teams • Strengthen organizational capability by mentoring engineers, building technical depth across the team, and creating a culture of technical excellence • Deliver memory IP that meets the most demanding customer requirements for density, speed, power, and reliability in production siliconWhat You'll Need • Bachelor's or Master's degree in Electronics Engineering, Telecommunication, Physics, or related technical discipline • Typically 10+ years of hands-on experience in custom physical layout design with deep expertise in advanced memory IP development • Demonstrated success delivering memory IP across multiple advanced technology nodes and tapeouts, including SRAM, ROM, or eDRAM in production silicon • Deep expertise in memory layout including bit-cell design, array structures, sense amplifiers, decoders, redundancy circuits, I/O, and peripheral blocks • Strong proficiency with layout tools such as Synopsys Custom Compiler, Cadence Virtuoso, or equivalent custom design platforms • Advanced understanding of foundry design rules, DRC/LVS closure methodologies, reliability requirements, EMIR validation, and memory-specific constraints • Experience developing layout automation, scripting solutions, or methodology improvements that enhance productivity and quality is highly valuedWho You Are • You solve the layout problems that others escalate, the ones involving conflicting constraints, ambiguous rules, or tradeoffs that require deep technical judgment • You can sit in a design review with circuit designers and foundry engineers, absorb conflicting requirements, and walk out with a layout strategy that actually works for everyone • You build trust across teams by being direct about what is possible, what is risky, and what needs to change, and you do it without creating unnecessary friction • You mentor by showing engineers how to think through a problem systematically, how to prioritize when everything feels critical, and how to build layouts that survive the full product lifecycle • You stay organized across multiple projects, shifting priorities, and cross-site collaboration without losing sight of what matters most: delivering silicon that works • You care about the details, the spacing that affects yield, the symmetry that affects matching, the routing that affects performance, because you know those details define whether the product succeeds The Team You'll Be Part Of Your recruiter will share more about the team structure and mission during the interview process. Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share • Email • LinkedIn • X • Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page • Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. • Time Away In addition to company holidays, we have ETO and FTO Programs. • Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. • ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. • Retirement Plans Save for your future with our retirement plans that vary by region and country. • Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys! 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