ASIC Physical Design, Manager
Da Nang, VietnamRTL / HDLVerificationCompilersPhysical designSoC / ASICPosted Aug 26, 2026via html-list
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ASIC Physical Design, Manager
Da Nang, Da Nang, Vietnam
Engineering
Employee
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Overview
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
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Job Description
Date posted 08/17/2026
Category Engineering
Hire Type Employee
Job ID 18306
Date Posted 08/17/2026
Alternate Job Titles
• Physical Design Lead
• ASIC Physical Design Manager
• Backend Design Manager
• Place and Route Manager
• Physical Implementation ManagerWe AreSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.You AreYou have spent a decade in physical design, and you know that the difference between a chip that tapes out clean and one that burns months in respins is usually a decision made during floorplanning that nobody questioned hard enough. You are the person who questions it. You have closed timing on designs running north of 2 GHz, and you understand that at those frequencies, every picosecond matters and every SI issue that looks small in simulation becomes a showstopper in silicon.Managing a team is not about delegation for you. It is about building engineers who can see three steps ahead, who understand why a clock tree decision today affects yield six months from now. You are comfortable in the gap between what the spec says and what will actually work. When a design review surfaces a conflict between performance targets and physical constraints, you pull the right people together, sketch the tradeoffs, and drive to a decision the team can execute against.You know the Synopsys toolchain deeply because you have lived in it. ICC2, Fusion Compiler, PrimeTime, these are instruments you have tuned to deliver results on 7nm, 5nm, and 3nm nodes where the margin for error is measured in atoms. At Synopsys, you will lead physical design for the interconnect technology that makes AI infrastructure possible.What You'll Be Doing
• Lead the complete physical design flow for high-speed die-to-die interconnect chips operating at 2 GHz and above, from RTL handoff through tape-out
• Drive floorplanning, power planning, clock tree synthesis, place-and-route, and physical verification on advanced nodes including 7nm, 5nm, and 3nm
• Own timing closure across all corners and modes, working with front-end teams to resolve critical paths and ensure SI/PI integrity
• Build, manage, and mentor a global physical design team, setting technical direction and developing engineers at multiple levels
• Collaborate with architecture, design, verification, and package teams to align physical implementation with product requirements and manage milestones
• Champion automation and methodology improvements using Tcl, Python, and Perl scripts that increase team productivity and design qualityThe Impact You Will Have
• Deliver the physical implementation for high-bandwidth, ultra-low latency chip-to-chip communication that powers AI training and inference infrastructure
• Set the standard for advanced-node physical design quality and methodology across Synopsys silicon engineering
• Drive multiple successful tape-outs on cutting-edge process nodes, ensuring first-pass silicon success
• Shape the physical design tool flows, automation frameworks, and best practices adopted across the organization
• Grow a team of engineers who become the next generation of technical leaders in physical design
• Advance Synopsys' position as a leader in AI silicon innovation through interconnect technology that enables next-generation systemsWhat You'll Need
• 10+ years of hands-on experience in physical design with deep expertise in high-frequency chip implementation and timing closure
• Proven track record leading physical design on advanced process nodes including 7nm, 5nm, or 3nm with multiple successful tape-outs
• Expert-level proficiency with Synopsys physical design tools including ICC2, Fusion Compiler, PrimeTime, StarRC, and RedHawk
• Strong scripting and automation skills in Tcl, Python, and Perl for flow development
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field, PhD is a strong plus
• Experience managing and mentoring engineering teams with a history of developing talentWho You Are
• You can spot the physical constraint that will break the schedule in three weeks and explain the fix to both the engineer and the program manager in terms each needs to hear
• You build teams by teaching people how to think through a problem, not just how to run a tool
• You manage multiple tape-outs across geographies without losing track of critical milestones or creating process overhead that slows the team down
• When a design is stuck, you make a call with the information you have and move forward with a plan the team can executeThe Team You'll Be Part OfYou will join a global Silicon Engineering team focused on AI silicon and high-speed interconnect technologies. The team collaborates across functions and geographies, working closely with architecture, design, verification, and product teams to deliver the physical implementation for chips that enable the next generation of AI infrastructure.Rewards and BenefitsWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
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Benefits
At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
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• Health & Wellness
Comprehensive medical and healthcare plans that work for you and your family.
• Time Away
In addition to company holidays, we have ETO and FTO Programs.
• Family Support
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
• ESPP
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
• Retirement Plans
Save for your future with our retirement plans that vary by region and country.
• Compensation
Competitive salaries.
** Benefits vary by country and region - check with your recruiter to confirm
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Hiring Journey at Synopsys
Apply
When you apply to join us, your resume, skills, and experience are first reviewed for consideration.
Phone Screen
Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have.
Interview
Next up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role.
Offer
Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept!
Onboarding
There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation.
Welcome!
Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!
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Source URL: https://careers.synopsys.com/job/da-nang/asic-physical-design-manager/44408/99402446832