Functional Verification Engineer, Staff -available Athens or Patra

Company: Qualcomm Europe, Inc., Greek Branch Office Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Functional Verification Engineer, Staff - Greece Location available Athens or Patra Job Description As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path. This is a Graphics Functional Design Verification position that involves: • Work with GPU Design and Architecture Teams to understand concepts and high-level requirements • Developing detailed Test and Coverage plans based on the Architecture and Micro-architecture. • Developing Verification Methodology, ensuring scalability and portability across environments. • Developing Verification environment, including all the respective components such as Stimulus, Checkers, Assertions, Trackers, and Coverage. • Developing Verification Plans and Testbenches for your functional domain. • Executing Verification Plans, including Design Bring-up, DV environment Bring-up, Regressions enabling all features under your care, and Debug of the test failures. • Tracking and report DV progress using a variety of metrics, including Bugs and Coverage. • Developing UVM tests for functional verification • Debugging and analyzing new features in the Graphics Processors (GPU) • Developing and deploying new verification methodologies around functional verification Skills and Experience we would love to see • 5+ years ASIC Design Verification, or related work experience • Verification skills: Test planning, Scripting (Perl & Python), Simulation, problem solving and debug. • System Verilog, UVM, Verilog or VHDL, C/C++ skills required. • Constrained random, Functional Coverage development, design debug experience required. Desirable: • RTL design experience and/or strong SoC architecture background • Experience with developing verification architectures • Experience with GPU Architectures and concepts and associated verification methodologies • Experience with version control systems like Perforce, ClearCase, GIT, etc. • Experience with issue tracking and task managements systems like JIRA • HW-SW co-verification and simulation • Formal verification Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. *References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. 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