PhD Position F/M PhD in Integrated and Printed Circuit Design for Sustainable and Ubiquitous Electronics
Inria (French Institute for Research in Computer Science and Automation)
RISC-VRTL / HDLFirmwarePhysical designSecurityPosted Aug 24, 2026via html-list
PhD Position F/M PhD in Integrated and Printed Circuit Design for Sustainable and Ubiquitous Electronics
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Contract type :
Fixed-term contract
Level of qualifications required :
PhD or equivalent
Fonction :
PhD Position
Level of experience :
Recently graduated
Context
The doctoral student will be working in the Inria-AIO team (https://team.inria.fr/aio/) and will receive their PhD from Sorbonne University. The Inria-Paris center is located at the heart of Paris, in the 13th arrondissement. Some details of the project are available as part of the public announcement, here: https://www.uoc.edu/en/news/2025/gaia-project-for-sustainable-iot, as well as the project website, here: https://gaia-pathfinder.eu/
Assignment
We are looking for an ambitious 3-year PhD candidate to join a European project, GAIA, studying the subject of biodegradable ultra low-power electronics. The position will start near the commencement of the project, 5-May 2026.
The GAIA project aims to design electronics for a ubiquitous and ecologically-aware Internet of Things. The project will solve this with a completely revolutionary approach to electronic design by using transient and biodegradeable materials. These new devices will be able to perform computation and communication with energy harvested from the environment and from ambient wireless signals. The PhD student will be part of the design and electronic characterization of these devices as well as proof-of-concept prototype electronics that will be manufactured in more traditional solid-state processes.
As part of this project, you will be expected to work closely with a multi-national European consortium consisting of experts in telecommunications, embedded systems, RFID, integrated circuits, and printed electronics. You will also be supported closely, day-to-day, with a researcher, an engineer, and an additional doctoral student researcher.
Main activities
• You will be involved in state-of-the-art research in ambient-powered biodegradable RFID electronics involving both standard silicon CMOS design of ultra low-power processors and radio components, as well as design and characterization of radio-frequency, analog, mixed-signal, and digital electronics made out of printed electronic devices on biodegradable substrates.
• Throughout your PhD, you will be expected to publish your research results in journals and present your work at academic conferences
• At the end of the 3-year contract, you will be expected to write and defend a doctoral manuscript in order to complete the PhD degree
Skills
• A deep understanding of Electrical Engineering fundamentals (voltage, current, reference circuits, amplifiers, noise, power, design tradeoffs, electricity & magnetism, microelectronic design, etc.)
• Rigorous understanding of computing systems, such as computer architecture and embedded systems
• Familiarity with commercial Integrated Circuit design tools, such as Virtuoso, Spectre, VCS, Calibre, etc.
• Some experience with compact modeling of devices using verilog-A, and some experience with both digital and analog process development kits (PDKs)
• Preferably, prior experience with CMOS tape-outs
• Ability to perform literature surveys and understand state-of-the-art research
• Excellent technical presentation and writing ability
• Language: day-to-day research will be conducted in English. Knowledge of French is helpful but not mandatory.
Benefits package
• Subsidized meals
• Partial reimbursement of public transport costs
• Leave: 7 weeks of annual leave + 10 extra days off due to RTT (statutory reduction in working hours) + possibility of exceptional leave (sick children, moving home, etc.)
• Possibility of teleworking and flexible organization of working hours
• Professional equipment available (videoconferencing, loan of computer equipment, etc.)
• Social, cultural and sports events and activities
• Access to vocational training
• Social security coverage
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General Information
• Theme/Domain :
Architecture, Languages and Compilation
Instrumentation et expérimentation
(BAP C)
• Town/city :
Paris
• Inria Center :
Centre Inria de Paris
• Starting date :
2026-10-01
• Duration of contract :
3 years
• Deadline to apply :
2026-09-30
Warning : you must enter your e-mail address in order to save your application to Inria. Applications must be submitted online on the Inria website. Processing of applications sent from other channels is not guaranteed.
Instruction to apply
Defence Security :
This position is likely to be situated in a restricted area (ZRR), as defined in Decree No. 2011-1425 relating to the protection of national scientific and technical potential (PPST).Authorisation to enter an area is granted by the director of the unit, following a favourable Ministerial decision, as defined in the decree of 3 July 2012 relating to the PPST. An unfavourable Ministerial decision in respect of a position situated in a ZRR would result in the cancellation of the appointment.
Recruitment Policy :
As part of its diversity policy, all Inria positions are accessible to people with disabilities.
Contacts
• Inria Team :
AIO
• PhD Supervisor :
Watteyne Thomas
/
thomas.watteyne@inria.fr
The keys to success
A good candidate should be capable of performing state-of-the-art research both individually and as part of a small team of scholars. They should also be able to clearly present their results both locally and within the consortium in order to facilitate successful collaboration. An ideal candidate will have significant experience with a broad range of integrated circuit designs including digital, analog, mixed-signal, and radio-frequency electronics, with a particular emphasis on digital integrated circuit design. This includes significant experience with RTL, either with verilog/VHDL and/or higher-level languages, and digital integrated circuit flows all the way to GDS. Some experience with RISC-V architecture is ideal. Candidates with experience with advanced techniques in digital physical design, such as dynamic voltage frequency scaling, low-voltage retention techniques, power/clock gating, and intermittent computing are especially welcome.
About Inria
Inria, the French national institute for research in digital science and technology, supports the French government in national research and innovation strategies in the digital field, acting as Digital Programs Agency. Inria leads over 300 research and innovation projects with its 3,500 scientists, engineers, and support staff, in partnership with universities and the digital ecosystem (businesses, entrepreneurs, and public stakeholders). Together, we explore strategic fields such as artificial intelligence, cybersecurity, quantum computing, cloud technologies, digital transformation in healthcare, digital twins, and digital technologies for defence. We develop practical solutions such as software, tech startups, partnerships with national companies, and cutting-edge training programmes. Our goal is to drive scientific, technological, and industrial excellence to ensure France’s digital sovereignty.
Source URL: https://jobs.inria.fr/public/classic/en/offres/2026-09892