EDA flow and Logic Synthesis Engineer (Staff Engineer)

Search Jobs Find Jobs For Where? Search Jobs EDA flow and Logic Synthesis Engineer (Staff Engineer) Dublin, Leinster, Ireland Engineering Employee Apply Save Job Share • Email • LinkedIn • X • Facebook Jump to • Overview • Job Description • Benefits • Culture • How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Date posted 06/29/2026 Category Engineering Hire Type Employee Job ID 17917 Remote Eligible No Date Posted 06/29/2026 We Are:At Synopsys, we drive the innovations that shape how we live and connect. Our technology is central to the Era of Pervasive Intelligence — from self-driving cars to learning machines — and we lead in chip design, verification, and IP integration that power high-performance silicon and software.Within our HPC Controller IP organization, the mid-end team is the bridge between RTL design and physical implementation. We build the flows, automation, and quality checks that synthesize, verify, package, and release complex soft IP at scale — and we hand physical-design teams inputs that are clean, constrained, and implementation-ready. You Are:A motivated mid-end engineer with a solid grasp of ASIC design and verification flows, and genuine enthusiasm for automation, flow robustness, and using AI to raise engineering productivity, debug speed, and quality of results. You partner naturally with RTL designers to understand design intent, turn their outputs into physical-design-ready inputs, and collaborate across verification, DFT, physical design, methodology, and tooling teams. You communicate clearly, take ownership, and let data guide your decisions. What You’ll Be Doing: • Develop, run, and support mid-end flows spanning synthesis, DFT, static checking (SpyGlass), formal equivalence, power analysis, and related quality gates. • Convert RTL outputs into clean, constrained, implementation-ready inputs for physical design. • Build and maintainTcl-based automation, dashboards, and project infrastructure — and apply AI to accelerate the work (e.g., triaging flow logs, summarizingQoRtrends, drafting and refactoring scripts). • Debug flow failures end to end:analyzereports, isolate root cause, and drive issues to closure with design, verification, DFT, and implementation teams. • Improve documentation, handoff criteria, and reusable collateral so execution stays consistent across IP programs. The Impact You Will Have: • Higher-quality RTL-to-physical-designhandoffs and lower implementation risk. • Faster, more scalable execution through stronger automation and AI-enabled analysis. • Synthesis, DFT, static, formal, and power issues caught earlier in the cycle. • Tighter collaboration across the RTL-to-implementation chain. • Robust, implementation-ready soft IP shipped with clear constraints, checks, and release collateral. What You’ll Need(Core): • Working knowledge of ASIC design, verification, and mid-end development flows, typically gained through 5+ years of relevant experience or equivalent project work. • Hands-on synthesis experience, with the ability toanalyzeand resolve synthesis issues. • StrongTclscripting skills and a practical, automation-first mindset. • Familiarity with at least two of: DFT concepts, static checking (SpyGlassor equivalent), formal equivalence (e.g., Formality), or power analysis — and willingness to grow across the rest. • Ability to use AI tools effectively to accelerate debugging, summarize results, and improve scripts and flows. • Strong analytical, problem-solving, communication, and documentation skills. • BS/MS in Electrical/Computer Engineering or equivalent experience. Nice to have : • Experience across the full mid-end set: DFT,SpyGlass, Formality, and power analysis. • IP development methodologies, IP packaging, or reusable IP delivery / release collateral. • Hands-on with Synopsys tools such as Fusion Compiler and VCSpyGlass. Who You Are: • Proactive, curious, and adaptable. • Collaborative and ethical. • Flow-oriented, AI-aware, and quality focused. • Resilient and resultsoriented. The Team You’ll Be A Part Of:You’ll work with a high-impact High-Performance-Compute team focused on delivering complex IP to the marketplace. You will collaborate across RTL design, verification, DFT, physical design, methodology, and project infrastructure teams to improve mid-end readiness and enable predictable downstream implementation. Rewards and Benefits:We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Your recruiter will provide more details about salary and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share • Email • LinkedIn • X • Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page • Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. • Time Away In addition to company holidays, we have ETO and FTO Programs. • Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. • ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. • Retirement Plans Save for your future with our retirement plans that vary by region and country. • Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Dublin View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys! 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