ASIC Physical Design, Staff Engineer

Search Jobs Find Jobs For Where? Search Jobs ASIC Physical Design, Staff Engineer Da Nang, Da Nang, Vietnam Engineering Employee Apply Save Job Share • Email • LinkedIn • X • Facebook Jump to • Overview • Job Description • Benefits • Culture • How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Date posted 08/20/2026 Category Engineering Hire Type Employee Job ID 18258 Date Posted 08/20/2026 Alternate Job Titles • Physical Design Engineer, Staff Level • ASIC Implementation Engineer, Staff • Staff Engineer, PnR and Signoff • Senior Physical Design Engineer, ASICWe AreSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.You AreYou have spent years in the trenches of physical design, turning RTL into silicon that actually closes, meets timing, and ships. The difference between a design that tapes out clean and one that needs three more spins is something you can see coming in the floorplan stage, and you are the kind of engineer who makes the call early, adjusts the plan, and keeps the project moving.You are comfortable owning the full physical implementation flow from synthesis through signoff. When a timing path refuses to close or an IR drop issue surfaces late in the cycle, you do not escalate first, you dig in, trace it back, and solve it. You know the tools deeply, Fusion Compiler, PrimeTime, StarRC, IC Validator, and you use them with intention, not just by rote.Working across teams comes naturally to you. Front-end hands you an RTL block, analog gives you constraints that shift midstream, CAD updates the flow, and you synthesize all of it into a coherent implementation without losing your thread or your timeline. You mentor others not by lecturing but by showing them how you think through a problem. At Synopsys, you will work on mixed-signal IP that powers real products, with a team that values both technical depth and the ability to ship.What You'll Be Doing • Lead physical implementation of high-speed interface IPs from RTL through GDSII, managing floorplanning, placement, CTS, routing, and signoff closure • Drive timing closure using PrimeTime, resolving setup and hold violations across multiple corners and modes in advanced process nodes • Execute power integrity analysis using RedHawk or Voltus, ensuring IR drop and electromigration compliance • Collaborate with front-end, analog design, CAD, and product teams to integrate IP blocks and resolve interface issues • Mentor engineers on physical design best practices, debug strategies, and methodology improvementsThe Impact You Will Have • Deliver high-performance mixed-signal IP that meets aggressive timing, power, and area targets for next-generation SoCs • Enable faster time-to-market for Synopsys customers by ensuring robust, signoff-clean physical implementations • Raise the technical capability of the physical design team through hands-on mentorship and knowledge sharing • Drive methodology improvements that reduce design cycle time and increase first-pass success rates • Support the adoption of advanced process nodes by solving complex physical design challenges in 7nm, 5nm, and belowWhat You'll Need • Bachelor's or Master's degree in Electrical Engineering with 8+ years of hands-on physical design experience in ASIC or IP development • Deep expertise in the full physical design flow from RTL to GDSII, including synthesis, place and route, and physical signoff • Proficiency with Synopsys physical design tools such as Fusion Compiler, IC Compiler II, PrimeTime, StarRC, and IC Validator • Strong understanding of advanced node challenges including finFET effects, multi-patterning, and low-power design techniques • Proven ability to close timing, power, and signal integrity on complex mixed-signal designs in 16nm or belowWho You Are • You make decisions with incomplete information, prioritize what matters, and adjust course when new data arrives without losing momentum • You can explain a timing violation or power integrity issue to different audiences and tailor the message so each one understands what they need to do next • You approach debugging methodically, isolate variables, test hypotheses, and document what you learn so the next person does not start from scratch • You are comfortable working autonomously, figuring out what needs to happen and making it happen without waiting for directionThe Team You'll Be Part OfYou will join the Synopsys Mixed-Signal IP organization, a team focused on the physical implementation of complex mixed-signal IPs and test chips. This group works closely with front-end design, analog teams, CAD, and product management to deliver high-quality IP solutions tailored to customer performance, power, and area requirements.Rewards and BenefitsWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share • Email • LinkedIn • X • Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page • Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. • Time Away In addition to company holidays, we have ETO and FTO Programs. • Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. • ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. • Retirement Plans Save for your future with our retirement plans that vary by region and country. • Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Da Nang View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys! 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