Monte Cimone 1 open roles

High-performance RISC-V processors and accelerators have been announced, but RISC-V- based HPC systems will need a holistic co-design effort, spanning memory, storage hierarchy interconnects and full software stack.

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Monte Cimone in the RISC-V ecosystem

  • Monte Cimone is an experimental RISC-V based HPC cluster announced by E4 Computer Engineering
  • Built to prove that RISC-V processors/accelerators can be assembled into a working HPC system, not just chips
  • Covered as the "first experimental RISC-V supercomputer" and benchmarked by the press (Tom's Hardware, The Next Platform, HPCwire)

Overview

Monte Cimone hiring right now

Open roles
1
Added in 30 days
0

Disciplines

  1. Firmware1

Skills named most

  1. Python1

Counted from this company's open roles on this board on 29 Oct 2026. Added means first seen on this board.