About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFiv
RTL / HDL jobs 1,988
Register-transfer-level and HDL design in Verilog, SystemVerilog, VHDL and Chisel.
Filter all 1,988 RTL / HDL roles →- Santa Clara, California, United StatesRISC-VRTL / HDLVerificationAug 30, 2026
ASIC/FPGA Logic Team Lead
Unifabrix
RTL / HDLSoC / ASICFPGAAug 30, 2026In this role you will be joining the UnifabriX VLSI team and be part of a group driving the next rack-level architectures, which will increase application performance and reduce overall costs. You will be leading a team of RTL designers (3
RTL Design Engineer
Snowcap Compute
RTL DesignRTL / HDLAug 30, 2026- 深圳、上海、北京、西安、成都RTL / HDLVerificationSoC / ASICAug 30, 2026
岗位职责: • 参与智能网卡芯片IP级或SOC级功能验证; • 与IC设计工程师沟通,参与所负责的IP或SOC验证功能点分解和验证计划制定; • 基于UVM验证方法学,参与所负责IP或SOC级别的仿真验证环境搭建; • 使用SystemVerilog和C语言开发测试向量并进行回归测试; • 参与计划及实施各种覆盖率分析。 任职要求: • 熟悉 system Verilog, UVM 以及 formal 验证方法; • 有开发 scalable and port
- 深圳、上海、北京、西安、成都RTL / HDLSoC / ASICFPGAAug 30, 2026
岗位职责: • 参与智能网卡芯片IP级或SOC级设计开发; • 负责实现模块的设计代码编写; • 和验证人员一起完成IP或SOC的交付,保证测试覆盖。 任职要求: • 本科以上学历,电子,计算机,通信相关专业; • 熟悉Verilog/VHDL/SystemVerilog,熟悉FPGA或ASIC相关开发工具; • 熟悉Ethernet, TCP/IP等网络相关协议; • 或者熟悉PCIe,Virtio,RDMA等相关协议; • 有芯片成功流片者优先。
RTL / Microarchitecture Engineers Position
Semidynamics Technology Services, S.L.
RTL / HDLAug 30, 2026- 上海RTL / HDLCompilersKernel / LinuxAug 30, 2026
工作内容:1. 参与编译器的架构设计与开发,并结合前沿技术如 AI,多核加速等,提供高性能编程解决方案;2. 开发仿真/原型系统的运行期的代码;3. 开发仿真/原型系统的测试;4. 具有算法和数据结构设计经验;5. 具有软件测试方法的经验。 岗位要求:1. 计算机、软件相关专业硕士及以上学历,三年及以上;2. 有 C/C++ 语言开发经验、Linux 或嵌入式开发经验,GCC, LLVM 或其他编译器开发经验者优先考虑;3. 对计算机体系结构有深入理解,熟悉编译原理和算法实
- RTL / HDLAug 30, 2026
- Roma, ItalyRISC-VRTL / HDLVerificationAug 30, 2026
The Role: As a Physical Design Senior Engineer, you will take technical ownership of the implementation for highly complex digital blocks, including high-speed interfaces, mixed-signal control logic, and automotive low-power modules. Worki
- Barcelona, Barcelona/Catalunya/Espanya, SpainRISC-VRTL / HDLVerificationAug 30, 2026
The Role: We are actively seeking a Silicon Design Framework and Emulation-Prototyping Engineer to join our dynamic and growing Hardware Design team. The mission of the role is to enable fast, reliable, and scalable hardware-software co-de
- Barcelona, Barcelona/Catalunya/Espanya, SpainRTL / HDLVerificationSoC / ASICAug 30, 2026
The Role: As a Senior Formal Verification Engineer, you will contribute to defining and leading the formal verification strategy for our systems. Responsibilities: · Work closely with system architects and design team to establish formal
- Roma, ItalyRTL / HDLVerificationFirmwareAug 30, 2026
The Role: As a Senior Functional Verification Engineer, you will be interfacing with architecture, design, physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may
- Roma, ItalyRTL / HDLVerificationFirmwareAug 30, 2026
The Role: As a Functional Verification Principal Engineer, you will be interfacing with architecture, de-sign, physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work
Junior DFT Engineer
OpenChip
Barcelona, Barcelona/Catalunya/Espanya, SpainRISC-VRTL / HDLVerificationAug 30, 2026We are actively seeking a Junior DFT Engineer to join our dynamic and growing Digital design team. The Role: • Work on design execution of silicon design • Work on SoC DFT architecture and DFM concept • Work on implementation and verifica
- Barcelona, Barcelona/Catalunya/Espanya, SpainRISC-VRTL / HDLVerificationAug 30, 2026
About Openchip Openchip is a European Silicon Engineering Company, headquartered in Barcelona, Spain. We aim to democratize the usage of Chips by developing Systems on Chip, SOCs, that combines RISC-V and accelerated chiplets for AI and HP
- Barcelona, Barcelona/Catalunya/Espanya, SpainRTL / HDLVerificationFirmwareAug 30, 2026
As a Functional Verification Engineer, you will be interfacing with architecture, design, physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-leve
RTL Engineer, Ethernet
Eridu AI
Bangalore, IndiaRTL / HDLAug 30, 2026- Saratoga, CARTL / HDLSoC / ASICAug 30, 2026
- RTL / HDLSoC / ASICAug 30, 2026
- RTL / HDLAug 30, 2026
- Paris OfficesRTL / HDLVerificationPhysical designAug 29, 2026
MEET ARAGO AND THE ARAGONIANS Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors. Founded in 2024 by AI
- Santa Clara, California, United StatesRISC-VRTL / HDLVerificationAug 29, 2026
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFiv
- Santa Clara, California, United StatesRISC-VRTL / HDLVerificationAug 29, 2026
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFiv
- Santa Clara, California, United StatesRISC-VRTL / HDLVerificationAug 29, 2026
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFiv
- Santa Clara, California, United StatesRISC-VRTL / HDLVerificationAug 29, 2026
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFiv
Firmware Development Engineer
Intrinsic ID
Ottawa, CanadaRTL / HDLVerificationKernel / LinuxAug 29, 2026Search Jobs Find Jobs For Where? Search Jobs Firmware Development Engineer Ottawa, Ontario, Canada Engineering Employee $98000-$147000 Apply Save Job Share • Email • LinkedIn • X • Facebook Jump to • Overview • Job Descript
Silicon Validation Manager
Intrinsic ID
Porto Salvo, PortugalRTL / HDLFirmwareFPGAAug 29, 2026Engineer the Future with Us We currently have 411 open roles Innovation Starts Here Search Jobs Find Jobs For Where? Search Jobs Silicon Validation Manager Porto Salvo, Lisbon District, Portugal Apply Now Save Category Engineering
Design Eng - Modeling
Lattice Semiconductor Corporation
Manila, PhilippinesRTL / HDLVerificationSoC / ASICAug 28, 2026Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide c
Senior Staff Design Engineer
Lattice Semiconductor Corporation
Penang, MalaysiaRTL / HDLVerificationFirmwareAug 28, 2026Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide c
- San Jose, California, United StatesRTL / HDLVerificationAug 28, 2026
The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and