Overview XCENA SoC의 ASIC Top을 integration하고, 검증합니다. XCENA 의 주요 IP는 주로 AXI Bus 상에서 동작하도록 구현되어 있으며, 이러한 AXI Bus 상의 IP 들을 통합하여 ASIC Top 설계를 수행합니다. ASIC Top integration 후, physical implementation을 위해 FPGA 합성(Xilinx Vivado 활용)이나 DC를 통한 ASIC 합성을
RTL / HDL jobs 3,287
Register-transfer-level and HDL design in Verilog, SystemVerilog, VHDL and Chisel.
Roles 1,981–2,010 of 3,287, newest first.
- RTL / HDLVerificationSoC / ASICAug 30, 2026
- RTL / HDLSoC / ASICAug 30, 2026
■ 회사 소개 엑시나(XCENA)는 AI 시대에 메모리의 역할을 새롭게 정의하는 반도체 팹리스 기업이다. 개방형 표준인 CXL(Compute Express Link)을 기반으로 AI 인프라의 메모리 확장성과 활용 효율을 높이는 차세대 메모리 디바이스를 제공한다. 이를 바탕으로 AI 인프라의 성능을 높이고 지연시간과 에너지 소비를 줄여 TCO(총소유비용)를 절감한다. 엑시나는 삼성전자와 SK하이닉스 출신 반도체 설계 전문가들
- RTL / HDLVerificationSoC / ASICAug 30, 2026
■ 회사 소개 엑시나(XCENA)는 AI 시대에 메모리의 역할을 새롭게 정의하는 반도체 팹리스 기업이다. 개방형 표준인 CXL(Compute Express Link)을 기반으로 AI 인프라의 메모리 확장성과 활용 효율을 높이는 차세대 메모리 디바이스를 제공한다. 이를 바탕으로 AI 인프라의 성능을 높이고 지연시간과 에너지 소비를 줄여 TCO(총소유비용)를 절감한다. 엑시나는 삼성전자와 SK하이닉스 출신 반도체 설계 전문가들
- RTL / HDLCompilersPhysical designAug 30, 2026
■ 회사 소개 엑시나(XCENA)는 AI 시대에 메모리의 역할을 새롭게 정의하는 반도체 팹리스 기업이다. 개방형 표준인 CXL(Compute Express Link)을 기반으로 AI 인프라의 메모리 확장성과 활용 효율을 높이는 차세대 메모리 디바이스를 제공한다. 이를 바탕으로 AI 인프라의 성능을 높이고 지연시간과 에너지 소비를 줄여 TCO(총소유비용)를 절감한다. 엑시나는 삼성전자와 SK하이닉스 출신 반도체 설계 전문가들
RTL Design Engineer
Snowcap Compute
RTL DesignRTL / HDLAug 30, 2026- 深圳、上海、北京、西安、成都RTL / HDLVerificationSoC / ASICAug 30, 2026
岗位职责: • 参与智能网卡芯片IP级或SOC级功能验证; • 与IC设计工程师沟通,参与所负责的IP或SOC验证功能点分解和验证计划制定; • 基于UVM验证方法学,参与所负责IP或SOC级别的仿真验证环境搭建; • 使用SystemVerilog和C语言开发测试向量并进行回归测试; • 参与计划及实施各种覆盖率分析。 任职要求: • 熟悉 system Verilog, UVM 以及 formal 验证方法; • 有开发 scalable and port
- 深圳、上海、北京、西安、成都RTL / HDLSoC / ASICFPGAAug 30, 2026
岗位职责: • 参与智能网卡芯片IP级或SOC级设计开发; • 负责实现模块的设计代码编写; • 和验证人员一起完成IP或SOC的交付,保证测试覆盖。 任职要求: • 本科以上学历,电子,计算机,通信相关专业; • 熟悉Verilog/VHDL/SystemVerilog,熟悉FPGA或ASIC相关开发工具; • 熟悉Ethernet, TCP/IP等网络相关协议; • 或者熟悉PCIe,Virtio,RDMA等相关协议; • 有芯片成功流片者优先。
RTL / Microarchitecture Engineers Position
Semidynamics Technology Services, S.L.
RTL / HDLAug 30, 2026IP Design Verification Engineer
Rebellions
RTL / HDLVerificationAug 30, 2026About the Job Rebellions은 NPU를 검증할 IP Design Verification (IP-DV) 전문가를 찾고 있습니다. IP-DV 직무는 Rebellions이 직접 설계하는 Neural/Tensor Core, Proprietary Network-on-Chip, Data Processing for UCIe/Ethernet/PCIe/HBM/HBF등 다양한 유형의 IP들에 대하여 전통적인 UVM 기반 Con
SoC/Top Design Engineer
Rebellions
RTL / HDLVerificationPhysical designAug 30, 2026About the Job As a SoC/Top Design Engineer, you will perform RTL integration and top-level design for complex SoC projects. This role involves defining system architecture, optimizing performance and power, and collaborating closely with v
Physical Design Engineer - Frontend
Rebellions
RTL / HDLPhysical designAug 30, 2026Responsibilities and Opportunities • Implement physical design (RTL to GDS) processes to achieve the best PPA • Conduct logic synthesis with/without physical-awareness, clock-gating insertion, and feasibility checks for new architectures •
- RTL / HDLPhysical designSoC / ASICAug 30, 2026
Responsibilities and Opportunities • Logic/IP Scan: Scan (compressor) insertion & DFT simulation, SoC DFT Planning • BIST: Logic BIST and BIRA/BIST insertion & simulation • Package-level test planning • DFD: Scan-dump & scan to dram logic
Physical Design Engineer - Backend
Rebellions
RTL / HDLPhysical designAug 30, 2026Responsibilities and Opportunities • Implement the physical design (RTL to GDS) to achieve the best PPA • Floorplanning & powerplanning include hard-macro placement • Optimize block partitioning to enhance TAT (turn-around-time) and qualit
SoC/Subsystem Design Engineer
Rebellions
RTL / HDLCompilersSoC / ASICAug 30, 2026About the Job As a Senior SoC/Subsystem Design Engineer, you will lead the architecture and integration of next-generation AI acceleration systems. This role demands a high-level integration of RTL design expertise and system-level optimiz
IP Design Engineer
Rebellions
RTL / HDLCompilersSoC / ASICAug 30, 2026About the Job As an IP Design Engineer, you will be responsible for the architecture and RTL implementation of AI acceleration IPs and core SoC components. This role involves close collaboration with cross-functional teams to bridge the ga
D2D/UCIe Solution Engineer
Rebellions
RISC-VRTL / HDLKernel / LinuxAug 30, 2026About the Job We are seeking a motivated Silicon Solutions Hardware/Software Engineer to join our D2D/UCIe. In this role, you will be responsible for D2D subsystem development, as well as the development and management of UCIe IP firmware.
RTL Engineer
Rebellions
RTL / HDLCompilersFirmwareAug 30, 2026About the Job Rebellions is the first company in the world to productize a UCIe-based die-to-die (D2D) interconnect for AI accelerator, stitching multiple NPU dies into a single chiplet system. As a RTL Engineer, you will own the RTL of th
- Saratoga, CARTL / HDLSoC / ASICAug 30, 2026
- RTL / HDLSoC / ASICAug 30, 2026
- Santa Clara, California, United StatesRISC-VRTL / HDLSoC / ASICAug 29, 2026
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFiv
- Santa Clara, California, United StatesRISC-VRTL / HDLSoC / ASICAug 29, 2026
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFiv
- Santa Clara, California, United StatesRISC-VRTL / HDLSoC / ASICAug 29, 2026
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFiv
- Santa Clara, California, United StatesRISC-VRTL / HDLSoC / ASICAug 29, 2026
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFiv
Senior Staff Engineer, Physical Design
Marvell Asia PTE Ltd
Austin, TXRTL / HDLPhysical designSoC / ASICAug 28, 2026About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new pos
Senior Staff Design Engineer
Lattice Semiconductor Corporation
Penang, MalaysiaRTL / HDLVerificationFirmwareAug 28, 2026Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide c
Senior DV methodologies & infrastructure
Advanced Micro Devices (AMD)
Bangalore, IndiaRTL / HDLVerificationSoC / ASICAug 28, 2026ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every
Senior Technical Staff Engineer - Validation (System Design)
Microchip Technology Inc.
San Jose, CA, usRTL / HDLFirmwareFPGAAug 27, 2026Company Description Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment,
Technical Staff Engineer - Design (FPGA Fabric)
Microchip Technology Inc.
San Jose, CA, usRTL / HDLFPGAAug 27, 2026Company Description Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment,
- San Jose$150K – $400K • Plus Significant EquityRTL / HDLSoC / ASICAug 27, 2026
About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are hea
Verification Engineer
Advanced Micro Devices (AMD)
MARKHAM, CanadaRTL / HDLVerificationSoC / ASICAug 27, 2026ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every