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Principal Software Engineer

Cadence Design Systems, Inc.

BEIJING 04Posted Sep 21, 2026
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Skills named in this posting

  • C
  • C++
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The Engineer is responsible for designing, implementing and maintaining software designed to perform transistor-level VLSI circuit simulation. The ideal candidate would have expertise in numerical techniques for VLSI circuit simulation. Understanding of analog/RF/custom IC design and verification practices is a strong plus. Candidate should have an advanced degree in electrical engineering, computer science, applied mathematics, or similar. Candidates with experience in related fields will be considered, particularly: 1. Numerical analysis, especially numerical linear algebra, sparse matrix techniques, or numerical methods for solution of ordinary differential equations; 2. High performance computing (HPC) and performance critical applications; 3. Including (but no limited) hardware-aware optimization, GPU, etc. 4. Computational electromagnetics Candidate should be proficient in C/C++ development. Demonstrated software engineering skills, with a good understanding of efficient implementation of high-performance numerical algorithms and associated data structure design, is a plus. Candidate should have strong communications and interpersonal skills and be able to work as part of a geographically distributed development team. The engineer should have ability to work with an engineering and cross-functional team to deliver innovative technologies in a production environment. We’re doing work that matters. Help us solve what others can’t.

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Original posting: cadence.wd1.myworkdayjobs.com

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RISC-V ecosystem

Cadence Design Systems, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

Cadence is a leading provider of EDA and semiconductor IP.

  • EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
  • Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows

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