Lead Product Engineer
Overview
- Added in 30 days
- 678
- At this company, still open
Skills named in this posting
- SystemVerilog
- Verilog
- VHDL
- Tcl
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Position: Lead Product Engineer
Grade: T3
Experience: 4-7 Yrs
Location: Noida
Position Description:
This Job involves product engineer role for Synthesis flows including LEC and CLP.
- Needs to work on synthesis engagement – address issue related to synthesis, LEC and CLP .
- Should work as individual contributor and be a team player and need to co-ordinate with cross geographic teams to address the issues .
Position Requirements:
Education qualification requirement :
B.E/B.Tech/M.Tech in Electrical, Electronics or Computer Science Engineer from reputed institute with good academic credential.
Experience requirement :
- Good understanding of HDLs (Verilog, SystemVerilog and/ or VHDL) is MUST
- RTL design and synthesis concepts is required.
- Understanding of low-power concepts and leakage and dynamic power optimization concepts
- Experience in Synthesis , LEC , CLP and PnR(not mandatory)
- Strong analytical and problem solving skills required
- Experience in process automation with PERL or Tcl scripting is required.
- He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design problems using these tools
We’re doing work that matters. Help us solve what others can’t.
Apply on the employer's site
Original posting: cadence.wd1.myworkdayjobs.com
RISC-V ecosystem
Cadence Design Systems, Inc. in the RISC-V ecosystem
RISC-V International: Strategic
Cadence is a leading provider of EDA and semiconductor IP.
- EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
- Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows
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