Analog Design, Sr.Staff Engineer-15024

Search Jobs Find Jobs For Where? Search Jobs Analog Design, Sr.Staff Engineer-15024 Boxborough, Massachusetts, United States Engineering Employee $136000-$204000 Apply Save Job Share • Email • LinkedIn • X • Facebook Jump to • Overview • Job Description • Benefits • Culture • How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Date posted 01.29.2026 Category Engineering Hire Type Employee Job ID 15024 Base Salary Range $136000-$204000 Remote Eligible No Date Posted 01.29.2026 We Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. In this role, you will work on the design, development, and refinement of Multi-Gbps NRZ & PAM4 SERDES IP. You will be part of a fast-growing analog and mixed signal R&D team developing high speed (>200Gbps) analog integrated circuits in the latest FinFET process nodes. Working from SerDes standards to block specifications, you quickly identify potential circuit architectures and successful design strategies. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team. You Are:You are an accomplished analog design engineer with a passion for pushing the boundaries of high-speed connectivity. You thrive on solving complex technical challenges and are energized by collaborating with cross-functional teams to deliver best-in-class silicon solutions. Your expertise in SerDes and high-speed analog circuit design is complemented by your hands-on experience in developing, verifying, and optimizing circuits for high performance, low power, and minimal area. You are deeply familiar with the intricacies of CMOS design, and have a proven track record of successfully taping out silicon-proven designs for modern communication interfaces. You are detail-oriented, with a rigorous approach to design documentation and verification, and you communicate complex technical concepts with clarity to both peers and customers. You are comfortable navigating the entire design flow, from architectural review and specification through layout, simulation, and silicon validation. Above all, you are motivated by the impact your work has on the industry and on the innovative products that shape the world. What You’ll Be Doing: • Ownership of Analog Macro level design • Tracking and reviewing the work of sub-block owners • Review SerDes standards and architecture documents to develop analog specifications • Identify and refine circuit implementations to achieve optimal power, area and performance targets. • Propose design and verification strategies that efficiently use simulator features to ensure highest quality design. • Oversee physical layout to minimize the effect of parasitics, device stress, and process variation. • Collaborate with digital RTL engineers on the development of calibration, adaptation and control algorithms for analog circuits. • Present simulation data for peer and customer review. • Mentor and review the progress of junior engineers. • Document design features and test plans. • Consult on the electrical characterization of your circuit within the SerDes IP product.What You’ll Need: • Advanced degree with 6+ years of SerDes/High-Speed analog design experience. • In-depth familiarity with transistor level circuit design - sound CMOS design fundamentals. • Silicon-proven experience implementing circuits for the TX, RX and Clock paths within a SerDes • Experience in leading a small team of designers collaborating on building blocks of a Macro level design • Detailed design experience with several of the following SerDes sub-circuits: receive equalizers, data samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillator, phase interpolator, delay-locked loop, phase-locked loop, bandgap reference, ADC, DAC • Experience optimizing FinFET CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of local device mismatch and proximity effects. • Awareness of ESD issues (i.e. circuit techniques, layout). and design for reliability (i.e. electro-migration, IR, aging, etc.). • Experience with EDA tools for schematic entry, physical layout, and design verification. • Knowledge of SPICE simulators and simulation methods. • Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture. • Experience with TCL, Perl, C, Python, MATLAB.Who You Are: • Innovative, analytical, and detail-oriented problem solver. • Effective communicator with strong presentation and documentation skills. • Collaborative team player who thrives in multidisciplinary environments. • Motivated mentor and coach for junior engineers. • Adaptable to changing project requirements and new technologies. • Self-driven and committed to continuous professional development.The Team You’ll Be A Part Of:You will join a high-impact analog/mixed-signal design team renowned for delivering state-of-the-art SerDes IP solutions. The team’s focus is on innovation, quality, and collaboration, working closely with digital design, layout, verification, and product engineering teams. Together, you will tackle complex design challenges, develop next-generation connectivity IP, and support customers worldwide in deploying industry-leading silicon solutions. Rewards and Benefits:We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. #LI-NK4 At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S. Apply Save Job test Share • Email • LinkedIn • X • Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page • Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. • Time Away In addition to company holidays, we have ETO and FTO Programs. • Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. • ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. • Retirement Plans Save for your future with our retirement plans that vary by region and country. • Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Boxborough View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you’ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you’ll be invited to join activities and training to help you ramp up for a successful future at Synopsys! BROWSE JOBS Find the open role that’s right for you Similar Jobs • Architect, Applications Engineering • Technical Product Management Architect – HAV AI Platform Strategy Sunnyvale, California • Validation / Verification Engineer, Sr Staff -18261 Nepean, Canada • PCIe System Architect/ Principal Engineer-18290 Sunnyvale, California Recently Viewed Jobs View all job opportunities here Saved Jobs View all job opportunities here View All Jobs Awards We're proud to receive several recognitions