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Custom SOC Intern - 2027

NVIDIA Corporation

China, ShanghaiRTL / HDLVerificationSoC / ASICPosted Sep 16, 2026
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Skills named in this posting

  • SystemVerilog
  • Verilog
  • UVM
  • AMBA / AXI
  • C
  • C++
  • Python
  • Perl
NVIDIA NVLink™ Fusion delivers industry-leading AI scale-up and scale-out performance with NVIDIA technology plus semi-custom ASICs or CPUs. These custom ASICs are tailored to meet unique performance, power, and feature requirements, allowing for deeper customization of elements like I/O capabilities, memory interfaces, and workload-specific accelerators. NVIDIA custom SOC team (Nvlink Fusion team) aims to create the best solutions for customers based on NVIDIA Industry-leading technologies. We are looking to grow our team with the smartest people in the world, join us if you want to learn about the world’s leading custom SOC solutions. What you’ll be doing: • Functional and IO IP development • Different IPs integration and release for custom silicon • Build SOC or sub-system, signoff function/performance and QoR • Methodology improvement for high-efficiency custom silicon development What we need to see: • Pursuing Master candidate in EE/CS or related field • Basic C/C++ knowledge is a must • Scripting knowledge (Perl/Python/Shell) • Basic digital circuit/verilog knowledge is a must • Basic verification knowledge is a must Ways to stand out from the crowd: • Quick learner, willing to take challenges in a new field • Fluent English and good communication skills • Familiar with VCS, system Verilog and UVM • Background with ASIC design flow, like synthesis • Familiar with AMBA protocols such as AXI, ACE, CHI, ATB, etc.

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Original posting: jobs.nvidia.com

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RISC-V ecosystem

NVIDIA Corporation in the RISC-V ecosystem

RISC-V International: Premier Board

Founded in 1993, NVIDIA is an AI computing company. The company is headquartered in Santa Clara, California.

  • NVIDIA is bringing CUDA platform support to RISC-V, i.e. allowing a RISC-V CPU to host CUDA GPU applications
  • Publicly credited the RVA23 profile as the enabler: "We wouldn't have considered porting CUDA to RISC-V without it"
  • Active in RISC-V International profile/standards work and a frequent presence in RISC-V ecosystem coverage

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