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Staff Engineer Design

Infineon Technologies AG

Bangalore BTPRTL / HDLVerificationFirmwarePosted Oct 30, 2026
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Skills named in this posting

  • SystemVerilog
  • UVM
  • PCIe
  • AMBA / AXI
Passionate about Wi-Fi technology and advanced semiconductor verification? Join our team as a Staff WLAN MAC Verification Engineer and play a key role in validating next-generation WLAN MAC designs for cutting-edge wireless products. Work with industry-leading verification methodologies, System Verilog/UVM, and emerging Wi-Fi standards including 802.11ax and 802.11be to ensure world-class quality and performance. Your role Key responsibilities in your new role • Develop and execute comprehensive verification plans for WLAN MAC digital designs and subsystems. • Build, enhance, and maintain System Verilog/UVM-based verification environments and testbenches. • Create test plans, verification scenarios, and functional tests for WLAN MAC protocols. • Develop and integrate Verification IP (VIP) for industry-standard interfaces such as AXI, AHB, APB, and PCIe. • Drive functional, assertion, and code coverage closure activities. • Perform regression management, debug simulation failures, and identify root causes. • Conduct CDC/RDC analysis and support gate-level verification sign-off. • Collaborate with design, architecture, firmware, and software teams throughout the product lifecycle. • Generate verification documentation, quality reports, and technical presentations. • Ensure verification completeness through rigorous quality checks and review processes. Your profile Qualifications and skills to help you succeed • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Electronics, or a related discipline. • 5+ years of experience in Digital Design Verification. • Strong expertise in WLAN MAC verification and wireless communication protocols. • Hands-on experience with SystemVerilog, UVM, assertions, and coverage-driven verification. • Deep understanding of WLAN standards including 802.11n, 802.11ac, 802.11ax, and 802.11be. • Experience working with bus protocols such as AXI, AHB, APB, PCIe, and related Verification IPs. • Proficiency with EDA tools from Synopsys, Cadence, or Siemens EDA (Mentor Graphics). • Strong knowledge of CDC/RDC verification methodologies and tools. • Excellent debugging, analytical, and problem-solving skills. • Ability to work across cross-functional teams and drive technical discussions independently. • Strong communication, documentation, and stakeholder management skills. #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity. Our hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon. Keerthini M H

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Original posting: jobs.infineon.com

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RISC-V ecosystem

Infineon Technologies AG in the RISC-V ecosystem

RISC-V International: Premier Board

Infineon Technologies AG is a German semiconductor manufacturer founded in 1999, when the semiconductor operations of the parent company Siemens AG were spun off.

  • Brought RISC-V to automotive: first to announce an automotive RISC-V microcontroller family
  • Showed a virtual prototype/virtual automotive RISC-V chip with Synopsys for early software development

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