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Product Validation Engineer II

Cadence Design Systems, Inc.

BEIJINGPosted Sep 21, 2026
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Cadence Design Systems, Inc.
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Skills named in this posting

  • Mixed-signal
  • Python
  • Tcl
  • Perl
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This position may cover SPICE: Spectre, SpectreRF, analog mixed-signal simulators product validation. The engineer will be reponsible for developing procedures, test cases, and designs to test, troubleshooting, and debugging to make sure the products are performing up to the specifications and upholding software quality standards. He/she will work closely with a group of professionals to enhance product quality and usability. Also need always try to build tools to assist and automate testing using scripting languages. Position Requirements: • MS in Microelectronics, EE, or relevant. • Understanding of semiconductor concepts and Custom IC design. • Exposure to Cadence Virtuoso Design Environment and/or analog circuit simulation is a plus. • Experience in scripting language like Python, Perl, Tcl, or CSH is a plus • Teamwork and good communication skills. • Fluent in written and spoken English is a must. We’re doing work that matters. Help us solve what others can’t.

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Original posting: cadence.wd1.myworkdayjobs.com

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RISC-V ecosystem

Cadence Design Systems, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

Cadence is a leading provider of EDA and semiconductor IP.

  • EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
  • Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows

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