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Deep Learning Performance Software Engineer

NVIDIA Corporation

China, Beijing, China, ShanghaiCompilersPosted Jul 29, 2026
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Skills named in this posting

  • C
  • C++
  • LLVM
  • MLIR
We are now looking for a Deep Learning Performance Software Engineer! We are expanding our research and development for deep learning. We seek excellent Software Engineers and Senior Software Engineers to join our team. We specialize in developing GPU-accelerated Deep learning software. Researchers around the world are using NVIDIA GPUs to power a revolution in deep learning, enabling breakthroughs in numerous areas. Join the team that builds software to enable new solutions. Your ability to work in a fast-paced customer-oriented team is required and excellent communication skills are necessary. What you’ll be doing: • Develop compilers and DSLs for deep learning workloads • Design and implement highly optimized deep learning kernels • Continuously improve the compiler architecture for current and next generation chips • Perform performance analysis on emerging AI workloads and integrate with AI frameworks What we need to see: • Master's or Ph.D degree (or equivalent experience) in relevant discipline (CE, CS&E, CS, AI) • Excellent C/C++ programming and software design skills • Experience with XLA, TVM, MLIR, LLVM, deep learning models and algorithms • 3+ years of relevant work experience NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people on the planet working for us. If you're creative and autonomous, we want to hear from you!

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Original posting: jobs.nvidia.com

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RISC-V ecosystem

NVIDIA Corporation in the RISC-V ecosystem

RISC-V International: Premier Board

Founded in 1993, NVIDIA is an AI computing company. The company is headquartered in Santa Clara, California.

  • NVIDIA is bringing CUDA platform support to RISC-V, i.e. allowing a RISC-V CPU to host CUDA GPU applications
  • Publicly credited the RVA23 profile as the enabler: "We wouldn't have considered porting CUDA to RISC-V without it"
  • Active in RISC-V International profile/standards work and a frequent presence in RISC-V ecosystem coverage

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