Software Engineer II
ZHUBEI 01Posted Sep 21, 2026
Overview
- Added in 30 days
- 678
- At this company, still open
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
A T2 Software Engineer is responsible for developing and validating software components under moderate supervision. This role focuses on implementing assigned features, debugging issues, and ensuring code quality by following established engineering standards and development processes. The engineer works on well-defined modules within a larger system, collaborates closely with senior team members for design guidance, and contributes to testing, integration, and continuous improvement of the product. The position requires solid programming fundamentals, problem-solving skills, and the ability to learn and apply new technologies within a structured engineering environment.
We’re doing work that matters. Help us solve what others can’t.
Apply on the employer's site
Original posting: cadence.wd1.myworkdayjobs.com
RISC-V ecosystem
Cadence Design Systems, Inc. in the RISC-V ecosystem
RISC-V International: Strategic
Cadence is a leading provider of EDA and semiconductor IP.
- EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
- Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows
Same employer
More roles at Cadence Design Systems, Inc.
HR Operations Assistant
Cadence Design Systems, Inc.
BELO HORIZONTEOct 29, 2026Sr Principal Project Manager - AE
Cadence Design Systems, Inc.
SHANGHAIRTL / HDLVerificationSoC / ASICOct 29, 2026Sr Credit & Collections Analyst
Cadence Design Systems, Inc.
SHANGHAIOct 29, 2026Sr Systems Engineer
Cadence Design Systems, Inc.
SHANGHAICompilersKernel / LinuxOct 29, 2026Sr Systems Engineer
Cadence Design Systems, Inc.
SHANGHAICompilersKernel / LinuxOct 29, 2026Software Engineer II: Hardware Job Scheduler R&D
Cadence Design Systems, Inc.
BELO HORIZONTERTL / HDLPhysical designSoC / ASICOct 29, 2026