Principal Design Engineer
Overview
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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
This role is for an existing vacancy.
This is an opportunity to join a dynamic and growing team of engineers developing extremely high-speed wireline communications transceivers in CMOS silicon.
This job opening is for Numerical Modeling & Architecture, helping guide the selection and specification of transceiver components using mathematical and computer modelling techniques.
The candidate will collaborate with analog designers, digital designers, applications engineers, and marketing specialists to help guide tradeoffs among conflicting design goals, and as such will be responsible for the performance of the end-to-end system.
This will also require involvement in lab characterization and analysis of finally realized designs. The position is full-time in our San Jose office.
Position Requirements:
The ideal candidate will have several of the following:
• The ability to think through engineering systems end-to-end and identify bottlenecks and weak points.
• Strong mathematical skills, in particular relating to linear systems (Fourier analysis, filter theory, etc.)
• Deep knowledge of communication systems fundamentals
• Strong coding skills for simulation and modelling, as well as data analysis
• Good experimental skills.
• Good knowledge of signal processing (DSP) algorithms and architecture.
• Good working knowledge of physics of signal propagation
• Good working knowledge of basic circuits
• Demonstrated capacity to self-educate themselves to pick up new fields of expertise
The ideal candidate will likely have a PhD in the mathematical or physical sciences.
The annual salary range for California is $140,000 to $260,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more
The annual salary range for Canada is $112,000 to $208,000 CAD. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more
The annual salary range for California is $140,000 to $260,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
We welcome applications from candidates with disabilities and in equity seeking groups. If you have accessibility needs during the application and interview process, we encourage you to make your needs known.
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Original posting: cadence.wd1.myworkdayjobs.com
RISC-V ecosystem
Cadence Design Systems, Inc. in the RISC-V ecosystem
RISC-V International: Strategic
Cadence is a leading provider of EDA and semiconductor IP.
- EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
- Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows
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