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interconnect fabric design and system level cache IP engineer

MediaTek Inc

HsinChuRTL / HDLPosted Mar 30, 2026
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Overview

MediaTek Inc
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Skills named in this posting

  • Low-power design (UPF)
1. Interconnect IP/Fabric IP/System-level-cache IP/related bus-subsys design for different products (smartphone/AUTO/...) 2. Cowork with DV team to secure functionality 3. Cowork with performance validation team to secure performance requirement (BW/latency) is met 4. IP Design Quality Control flow execution (lint, CDC, spyglass DFT, UPF,...) 5. RTL Front-End flow execution (SDC quality check, clock constraint check, ...) #LI-LL1

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Original posting: careers.mediatek.com

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RISC-V ecosystem

MediaTek Inc in the RISC-V ecosystem

RISC-V International: Strategic

We make semiconductor technology for #Smartphone, #IoT, #Network as well as TV, Tablet, Blu-ray & many other devices.

  • Named in coverage of RISE, the Linux Foundation Europe RISC-V Software Ecosystem project, and RISC-V edge-AI market analysis
  • Listed on the landscape as a RISC-V International member

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