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Lead Application Engineer

Cadence Design Systems, Inc.

KATOWICE 01RTL / HDLVerificationFPGAPosted Oct 13, 2026
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Skills named in this posting

  • SystemVerilog
  • Verilog
  • VHDL
  • UVM
  • Python
  • Tcl
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Lead Application Engineer Location: Katowice, Poland Reports to: Application Engineering Group Director Job Overview: As an Application Engineer for Emulation and Prototyping, you will be part of a growing team supporting customer engagements. You will help deliver technical solutions, support customer activities, and enable successful deployment of Cadence emulation technologies. This is a customer-facing technical role combining hands-on engineering, problem solving, and collaboration with global Cadence teams. The role is based in the Cadence Katowice office and follows a remote engagement model, primarily supporting customers in Israel. Job Responsibilities: Customer Engagement & Support • Work directly with customers to deploy and support emulation and prototyping solutions • Help investigate and resolve technical issues, providing timely and effective support • Build collaborative relationships with customer engineering teams Technical Execution • Contribute to emulation and acceleration workflows, including debug and performance optimisation • Support benchmarks, tool evaluations, and proof-of-concept (PoC) activities Solution Development • Contribute to the development of customer-specific solutions using Cadence tools • Collaborate with senior engineers and team leads on more complex engagements Collaboration • Partner with the local R&D team in Poland and with global Cadence R&D and Application Engineering teams • Support global hyperscaler customers (including collaboration with teams in Israel), working effectively across regions and time zones Required Skills & Experience Core Requirements • Experience in digital design or verification • Strong RTL knowledge (SystemVerilog, Verilog, or VHDL) • Experience with simulation and debug workflows Preferred (Nice to Have) • Experience with FPGA development • Familiarity with UVM or modern verification methodologies • Experience with Linux/Unix environments and scripting (e.g. Python, Tcl) Qualifications • BS/MS in Electrical Engineering, Computer Engineering, or a related field • 3-5 years of relevant industry experience Additional Information: • Must be EU national or eligible to stay and work in Poland Check what we can offer you: • Competitive salary package adequate to competencies • Work from office or hybrid • Continuous professional development: trainings and seminars • Possibility to cooperate with people from around the world in an expanding global organization • Employee Stock Purchase Plan, bonuses and stocks • Private medical care • Life insurance • Multisport Plus cards • Social Fund benefits • Recommendation bonuses & Internal recognition program • Additional paid days off Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace. We’re doing work that matters. Help us solve what others can’t.

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Original posting: cadence.wd1.myworkdayjobs.com

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RISC-V ecosystem

Cadence Design Systems, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

Cadence is a leading provider of EDA and semiconductor IP.

  • EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
  • Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows

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