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Design-for-Test (DFT) Engineer – High-Performance CPU (New Grad)

MediaTek Inc

Austin, TXPosted Oct 19, 2026
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MediaTek is a global fabless semiconductor industry leader, providing solutions from the edge to the cloud and powering over 2 billion connected devices every year. Established in 1997, our leading-edge technologies keep the world connected and enhance everyday life. At the forefront of innovation, MediaTek drives advancements in transformative technologies such as AI, 5G/6G, Wi-Fi 8, and Embedded IoT. Our high-performance, power-efficient solutions form the foundation for a smarter, more connected world — enabling everything from smartphones, smart homes, and AI PCs to high-performance computing, automotive, embedded IoT systems, and AI data centers. As a trusted partner to the world's leading brands, we are committed to ensuring access to world-class technology for everyone. Our dedication to accelerating AI underscores our mission to enrich the future of humanity. We are looking for a Design-for-Test (DFT) Engineer to support high-performance (>4 GHz) CPU subsystems using the latest DFT methodologies and techniques. In this role, you will help define and implement DFT architectures to meet test coverage goals, generate and simulate test patterns, and support post-silicon validation activities. Key Responsibilities Contribute to DFT architecture definition and implementation for high-performance CPU subsystems. Generate test patterns and simulate them at gate level to validate correctness and coverage. Support post-silicon validation by generating, analyzing, and debugging failing patterns on silicon.

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Original posting: careers.mediatek.com

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RISC-V ecosystem

MediaTek Inc in the RISC-V ecosystem

RISC-V International: Strategic

We make semiconductor technology for #Smartphone, #IoT, #Network as well as TV, Tablet, Blu-ray & many other devices.

  • Named in coverage of RISE, the Linux Foundation Europe RISC-V Software Ecosystem project, and RISC-V edge-AI market analysis
  • Listed on the landscape as a RISC-V International member

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