Stage ingénieur : Conception circuits analogiques: Etude du buffer pour une référence de tension ultra précise et invariable dans le temps (F/M)
NXP Semiconductors Netherlands B.V.
ToulousePosted Sep 30, 2026
Overview
Au sein du centre de développement de circuits intégrés destinés aux applications de batteries pour véhicules électriques, le(a) stagiaire prendra en charge/réalisera les missions suivantes :
• Etude et compréhension des références de tensions existantes et utilisées
• Etude des différentes solutions de buffer existantes : performances de précision, taille du bloc, consommation et détermination du meilleur compromis
• Conception et Simulation dans l’environnement Cadence et utilisation de nos outils de simulation (Equivalent de Spice pour les circuits)
The intern will be responsible for the following tasks:
• Study and gain a thorough understanding of the existing voltage reference circuits currently in use.
• Evaluate the different buffer solutions available, including their accuracy performance, area, and power consumption, and identify the best trade-off.
• Design and simulate circuits in the Cadence environment, using our simulation tools (SPICE-equivalent tools for integrated circuit design).
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Original posting: nxp.wd3.myworkdayjobs.com
RISC-V ecosystem
NXP Semiconductors Netherlands B.V. in the RISC-V ecosystem
RISC-V International: Strategic
NXP Semiconductors NV is American Dutch semiconductor manufacturer with dual headquarters in Eindhoven, Netherlands and Austin, Texas.
- NXP is putting RISC-V cores into its mainstream products: a Linux-capable RISC-V core was reported to debut on an NXP i.MX SoC
- Broad MCU/applications-processor vendor tracked in RISC-V market analyses alongside other incumbents
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