[2027 Internship] Custom IC Layout Engineer Intern

Curious about how the tiny chips inside your phone, laptop, or smartwatch are actually made? Want to get hands-on with the tech that powers the future? Join us as a Custom IC Layout Engineer Intern and dive into the world of microchip design! [What’s in it for you?] • Get a behind-the-scenes look at how microchips are designed and implemented from scratch • Learn the essentials of Physical Design (aka Layout) for Integrated Circuits – no prior experience needed • Be part of a passionate team working on cutting-edge Foundation IP, Analog IP, or RFIC using the latest CMOS technology • Master industry-standard EDA tools (Cadence, Synopsys, Siemens) and build real layouts for real projects • Work on live assignments: floor-planning, device placement, signal routing, debugging, and more • Collaborate with experts and other interns to optimize chips for Power, Performance, and Area (PPA) • Boost your resume with hands-on experience that top tech companies are looking for #LI-WC1