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Technical Marketing Engineer – FPGA Design

Advanced Micro Devices (AMD)

Belfast, United KingdomRTL / HDLSoC / ASICFPGAFull TimePosted Oct 9, 2026
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Skills named in this posting

  • SystemVerilog
  • Verilog
  • VHDL
  • Python
  • Tcl
  • Vivado / Quartus
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them. AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward. THE ROLE: The person in the role of Technical Marketing Engineer for AMD-AECG is a motivated individual who contributes to the Vivado and next generation tool product roadmap to serve customer needs. This person supports feature validation, documentation, training materials and customer enablement across the full breadth of Vivado tool areas. Technical Marketing works closely with product planning, R&D, applications engineering and customers to improve the FPGA and Adaptive SoC design process and enable the next generation of designs and methodologies. The environment is fast moving, global and focused on emerging technologies. THE PERSON: The successful Technical Marketing Engineer contributes to defining, validating and supporting Vivado tools and methodologies across the full tool suite — including design flows, simulation, debug, IP integration, implementation, scripting, and deployment. This person is eager to learn, works well under guidance from senior team members, and is developing the ability to communicate technical concepts clearly to both internal and external audiences. We operate with an agentic AI-first mindset and expect team members to actively incorporate AI into how they work. KEY RESPONSIBILITIES: • Support sales enablement through pre-sales and post-sales activities for new features under guidance from senior team members. • Contribute to the creation of training materials, tutorials, user guides, demos, videos, example designs, and application notes for AMD FPGA and Adaptive SoC hardware tools. • Support planning in defining and validating tool features, flows, and methodologies across Vivado. • Collaborate with engineering teams to verify tool features and document expected behavior. • Assist in field and customer communication, helping to clarify tool capabilities and design approaches. • Evaluate field and customer feedback under direction from senior team members and contribute to feature improvement proposals. • Learn and develop expertise across multiple Vivado tool areas — building breadth that enables flexible contribution wherever the team needs support. • Support new product and feature launches, contributing to collateral creation and field readiness activities. PREFERRED EXPERIENCE: • Working knowledge of FPGA design tools and flows (academic or professional). • Familiarity with one or more of: RTL simulation, synthesis, implementation, debug, IP integration, or scripting (Tcl, Python). • Familiarity with HDL languages such as Verilog, SystemVerilog, or VHDL. • Curiosity and aptitude to learn new tool areas quickly. • Hands-on experience applying AI agents and copilots to automate engineering workflows or solve technical problems. • Strong written and verbal communication skills with a desire to create clear technical content. • Ability to work effectively in a global team environment. • Coursework or project experience in FPGA, ASIC, or SoC design is highly valued. ACADEMIC CREDENTIALS: • Bachelor’s Degree in Computer Science, Computer Engineering, Electrical Engineering, or related equivalent with relevant experience; OR • Master’s Degree with relevant experience is preferred Recent graduates with strong FPGA project experience are encouraged to apply. LOCATION: Belfast, Northern Ireland, United Kingdom (different location arrangements will not be considered for this role). #BP #LI-LC1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. THE ROLE: The person in the role of Technical Marketing Engineer for AMD-AECG is a motivated individual who contributes to the Vivado and next generation tool product roadmap to serve customer needs. This person supports feature validation, documentation, training materials and customer enablement across the full breadth of Vivado tool areas. Technical Marketing works closely with product planning, R&D, applications engineering and customers to improve the FPGA and Adaptive SoC design process and enable the next generation of designs and methodologies. The environment is fast moving, global and focused on emerging technologies. THE PERSON: The successful Technical Marketing Engineer contributes to defining, validating and supporting Vivado tools and methodologies across the full tool suite — including design flows, simulation, debug, IP integration, implementation, scripting, and deployment. This person is eager to learn, works well under guidance from senior team members, and is developing the ability to communicate technical concepts clearly to both internal and external audiences. We operate with an agentic AI-first mindset and expect team members to actively incorporate AI into how they work. KEY RESPONSIBILITIES: • Support sales enablement through pre-sales and post-sales activities for new features under guidance from senior team members. • Contribute to the creation of training materials, tutorials, user guides, demos, videos, example designs, and application notes for AMD FPGA and Adaptive SoC hardware tools. • Support planning in defining and validating tool features, flows, and methodologies across Vivado. • Collaborate with engineering teams to verify tool features and document expected behavior. • Assist in field and customer communication, helping to clarify tool capabilities and design approaches. • Evaluate field and customer feedback under direction from senior team members and contribute to feature improvement proposals. • Learn and develop expertise across multiple Vivado tool areas — building breadth that enables flexible contribution wherever the team needs support. • Support new product and feature launches, contributing to collateral creation and field readiness activities. PREFERRED EXPERIENCE: • Working knowledge of FPGA design tools and flows (academic or professional). • Familiarity with one or more of: RTL simulation, synthesis, implementation, debug, IP integration, or scripting (Tcl, Python). • Familiarity with HDL languages such as Verilog, SystemVerilog, or VHDL. • Curiosity and aptitude to learn new tool areas quickly. • Hands-on experience applying AI agents and copilots to automate engineering workflows or solve technical problems. • Strong written and verbal communication skills with a desire to create clear technical content. • Ability to work effectively in a global team environment. • Coursework or project experience in FPGA, ASIC, or SoC design is highly valued. ACADEMIC CREDENTIALS: • Bachelor’s Degree in Computer Science, Computer Engineering, Electrical Engineering, or related equivalent with relevant experience; OR • Master’s Degree with relevant experience is preferred Recent graduates with strong FPGA project experience are encouraged to apply. LOCATION: Belfast, Northern Ireland, United Kingdom (different location arrangements will not be considered for this role). #BP #LI-LC1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

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Original posting: careers.amd.com

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RISC-V ecosystem

Advanced Micro Devices (AMD) in the RISC-V ecosystem

RISC-V International: Strategic

For more than 45 years AMD has driven innovation in high-performance computing, graphics, and visualization technologies; the building blocks for gaming, immersive platforms, and the data center.

  • Ships MicroBlaze V, a RISC-V soft-processor core for AMD FPGAs/adaptive SoCs (docs, Vitis quick-start guide, BSP macros)
  • amd.com states AMD has been a RISC-V member since 2020
  • ROCm/LLVM docs include a RISC-V code-generation target; RISC-V debug support in AMD tools

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