← Back to roles

AI Intern - Technical Communications (System Design Analysis Group)

Cadence Design Systems, Inc.

CORK 01Posted Sep 21, 2026
Apply on Cadence Design Systems, Inc.

Overview

Cadence Design Systems, Inc.
Open roles
678
At this company
See all
Similar roles
1
Same title, 1 company
Search
Added in 30 days
678
At this company, still open

Skills named in this posting

  • Python
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. AI Intern - Technical Communications (SDA Group) Location: Cork Reports to: Technical Communications Architect Responsibilities: • Develop Python-based tools and automation solutions for Technical Communications. • Build AI-powered applications using LLMs, agentic AI concepts, APIs, and web technologies. • Analyze workflows and implement practical AI solutions that improve efficiency and productivity. • Collaborate with engineers and technical writers to translate business needs into working solutions. • Prototype innovative approaches for content intelligence, knowledge management, and process automation. Job Qualifications: • Currently pursuing a degree in Computer Science, Artificial Intelligence, Engineering, or a related field. • Proficient in Python programming. • Strong analytical and problem-solving skills with the ability to work independently. • Demonstrated interest in AI, automation, and software development. • Curious, self-motivated, and eager to understand complex processes and improve them through technology. • (Bonus) Familiarity with Visual Studio/VS Code, web application development, networking, Git, APIs, or modern AI frameworks. We’re doing work that matters. Help us solve what others can’t.

Apply on the employer's site

Original posting: cadence.wd1.myworkdayjobs.com

Apply on Cadence Design Systems, Inc.

RISC-V ecosystem

Cadence Design Systems, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

Cadence is a leading provider of EDA and semiconductor IP.

  • EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
  • Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows

Same employer

More roles at Cadence Design Systems, Inc.

View all 678