Physical Layer Architecture Engineer
Overview
- Added in 30 days
- 647
- At this company, still open
Skills named in this posting
- PCIe
- USB
With the growing demand for traffic bandwidth in datacenters, efficient physical high-speed communication becomes a crucial part of the development of silicon ASC’s that serve networking infrastructures. We are looking for a PHY (Physical Layer) Architect for our Architecture team. We are positioning you to a key role to face this challenge and become part of our team, so we can continue developing the best devices in the industry.
NVIDIA's networking architecture group is seeking for a highly skilled, leading engineer to explore, and define the Physical layer of our products. As a lead engineer, you'll be responsible to define and drive features and have responsibility on the Physical layer architecture. The role will include definition of both the hardware circuitry and the firmware/software that is involved in operating the physical layer communication, with emphasis on the former. We are searching for hardworking, enthusiastic, engineer which has both highly technical skills as well as good personal skills, in order to be able to lead cross groups activities.
What you will be doing:
• Lead projects across team, starting from processing requirements and definitions from customers and translating those into detailed technical specification for hardware architecture, system embedded software, user interface and high-level design.
• Supervise the implementation of projects by team-leaders / developers / QA, participate in low level design reviews, QA test plans reviews, and keep track of changes and handle obstacles.
• Define the architecture of implementing physical layer standards into NVIDIA's ASIC devices.
• Involved in standard bodies activities and definition of next generation protocols.
• Define features for the phy layer, to exploit interoperability between different generations of communication.
• Be involved in product definition and the high-speed protocols that the NVIDIA networking devices will support.
• Work closely with multi-functional teams - design, backend, system, marketing, firmware, driver, etc. Provide architecture definitions and as a result converge on key design decisions.
• Become focal point for NVIDIA’s physical layer networking communication devices.
What we need to see:
• BS or MS degree in EE
• 3+ years of experience in the following fields: Physical layer communication / System / Signal Integrity / high speed communication protocols.
• Excellent problem solving, teamwork, and interpersonal skills,
• Background in embedded software
• Experience in networking
• Experience in Wire Line Physical layer protocols like IEEE 802.3, InfiniBand, PCIe, USB, etc.
• Communication skills, analytical abilities, technically hands-on.
We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided a reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request an accommodation.
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Original posting: jobs.nvidia.com
RISC-V ecosystem
NVIDIA Corporation in the RISC-V ecosystem
RISC-V International: Premier Board
Founded in 1993, NVIDIA is an AI computing company. The company is headquartered in Santa Clara, California.
- NVIDIA is bringing CUDA platform support to RISC-V, i.e. allowing a RISC-V CPU to host CUDA GPU applications
- Publicly credited the RVA23 profile as the enabler: "We wouldn't have considered porting CUDA to RISC-V without it"
- Active in RISC-V International profile/standards work and a frequent presence in RISC-V ecosystem coverage
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