RTL Digital Design Engineer

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them. AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward. THE ROLE: AMD is looking for a highly motivated Digital Design Engineer to join our team developing next-generation PCI Express (PCIe) IP that powers AMD's industry-leading server, client, GPU, and semi-custom products. In this role, you will contribute to all aspects of ASIC RTL design, from architecture definition and microarchitecture development through implementation, verification support, and post-silicon bring-up. You will collaborate with a talented global team to create innovative, high-performance, and power-efficient designs that enable cutting-edge computing solutions. THE PERSON: The ideal candidate is a passionate and detail-oriented engineer who enjoys solving complex technical challenges and delivering high-quality results. You are driven by continuous learning, thrive in collaborative environments, and take ownership of your work from concept to completion. You communicate effectively across cross-functional teams and demonstrate a strong commitment to innovation, execution, and engineering excellence. Key characteristics for success include: • Strong problem-solving and analytical skills with a focus on quality and execution. • Self-motivated learner with the ability to quickly acquire new technical skills. • Collaborative team player who can also work independently with minimal guidance. • Effective communicator capable of clearly presenting technical concepts and ideas. • Creative thinker with a passion for innovation and attention to detail. • Committed to meeting project milestones while maintaining engineering rigor. KEY RESPONSIBILITIES: • Design and develop RTL for AMD's PCI Express (PCIe) IP used across next-generation server, client, GPU, and semi-custom products. • Partner with architects and design teams to define and implement innovative microarchitectural features. • Drive high-quality RTL development with focus on timing closure, CDC analysis, lint compliance, and overall design robustness. • Implement and optimize low-power design techniques while maintaining performance and functionality targets. • Collaborate with verification engineers to support simulation, debug, validation, and issue resolution throughout the project lifecycle. • Participate in silicon bring-up activities and contribute to debugging post-silicon and customer-reported issues. • Support design reviews and continuously improve design methodologies and development processes. PREFERRED EXPERIENCE: • Extensive experience in ASIC/SoC digital design and RTL development using Verilog/SystemVerilog. • Strong understanding of synchronous digital design principles and multi-clock domain implementations. • Hands-on experience with lint, CDC, and timing analysis methodologies and tools. • Experience creating or contributing to technical specifications and microarchitecture documentation. • Knowledge of low-power design techniques and ASIC design flows. • Familiarity with silicon validation and hardware debug using lab equipment such as logic analyzers and oscilloscopes. • Understanding of high-speed interface protocols such as PCI Express (PCIe), USB, SATA, Ethernet, or similar technologies. • Experience collaborating across architecture, verification, physical design, and silicon validation teams. ACADEMIC CREDENTIALS: • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Engineering Science, or a related field. • Master's degree preferred. LOCATION: Vancouver, British Columbia, Canada #LI-MO2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. THE ROLE: AMD is looking for a highly motivated Digital Design Engineer to join our team developing next-generation PCI Express (PCIe) IP that powers AMD's industry-leading server, client, GPU, and semi-custom products. In this role, you will contribute to all aspects of ASIC RTL design, from architecture definition and microarchitecture development through implementation, verification support, and post-silicon bring-up. You will collaborate with a talented global team to create innovative, high-performance, and power-efficient designs that enable cutting-edge computing solutions. THE PERSON: The ideal candidate is a passionate and detail-oriented engineer who enjoys solving complex technical challenges and delivering high-quality results. You are driven by continuous learning, thrive in collaborative environments, and take ownership of your work from concept to completion. You communicate effectively across cross-functional teams and demonstrate a strong commitment to innovation, execution, and engineering excellence. Key characteristics for success include: • Strong problem-solving and analytical skills with a focus on quality and execution. • Self-motivated learner with the ability to quickly acquire new technical skills. • Collaborative team player who can also work independently with minimal guidance. • Effective communicator capable of clearly presenting technical concepts and ideas. • Creative thinker with a passion for innovation and attention to detail. • Committed to meeting project milestones while maintaining engineering rigor. KEY RESPONSIBILITIES: • Design and develop RTL for AMD's PCI Express (PCIe) IP used across next-generation server, client, GPU, and semi-custom products. • Partner with architects and design teams to define and implement innovative microarchitectural features. • Drive high-quality RTL development with focus on timing closure, CDC analysis, lint compliance, and overall design robustness. • Implement and optimize low-power design techniques while maintaining performance and functionality targets. • Collaborate with verification engineers to support simulation, debug, validation, and issue resolution throughout the project lifecycle. • Participate in silicon bring-up activities and contribute to debugging post-silicon and customer-reported issues. • Support design reviews and continuously improve design methodologies and development processes. PREFERRED EXPERIENCE: • Extensive experience in ASIC/SoC digital design and RTL development using Verilog/SystemVerilog. • Strong understanding of synchronous digital design principles and multi-clock domain implementations. • Hands-on experience with lint, CDC, and timing analysis methodologies and tools. • Experience creating or contributing to technical specifications and microarchitecture documentation. • Knowledge of low-power design techniques and ASIC design flows. • Familiarity with silicon validation and hardware debug using lab equipment such as logic analyzers and oscilloscopes. • Understanding of high-speed interface protocols such as PCI Express (PCIe), USB, SATA, Ethernet, or similar technologies. • Experience collaborating across architecture, verification, physical design, and silicon validation teams. ACADEMIC CREDENTIALS: • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Engineering Science, or a related field. • Master's degree preferred. LOCATION: Vancouver, British Columbia, Canada #LI-MO2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.