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Physical Verification Sign-off Engineer

MediaTek Inc

SingaporePhysical designPosted Sep 3, 2026
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MediaTek Inc
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Skills named in this posting

  • Place and route
• Responsible for Full-chip Physical Verification Sign-off in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out. • Co-work with Place & Route team to resolve full-chip layout integration issues. • Coordinates with internal IP owners on IP related issues. • Coordinates with Manufacturing Team on DRC related issues. • Provide automation solutions to improve efficiency in tape-out flow. • Report on tapeout issues #LI-WC1

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Original posting: careers.mediatek.com

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RISC-V ecosystem

MediaTek Inc in the RISC-V ecosystem

RISC-V International: Strategic

We make semiconductor technology for #Smartphone, #IoT, #Network as well as TV, Tablet, Blu-ray & many other devices.

  • Named in coverage of RISE, the Linux Foundation Europe RISC-V Software Ecosystem project, and RISC-V edge-AI market analysis
  • Listed on the landscape as a RISC-V International member

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