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DFT Engineer - Advanced Process Platform(Scan / MBIST / BSD / Silicon Diagnosis)

MediaTek Inc

HsinChuSoC / ASICPosted Nov 6, 2025
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Skills named in this posting

  • DFT
  • UCIe / chiplets
Join MediaTek's "DFT for Advanced Process Platform" team -- your work directly impacts Cloud ASIC reliability and yield at the most advanced process nodes (N4/N3/N2 and beyond). - DFT Architecture & Insertion: Define and implement Scan (full-scan, compressor), MBIST, and BSD/JTAG strategies for advanced-node SoCs and chiplet/3D-IC designs; own end-to-end insertion flows with Synopsys / Siemens (Tessent) EDA tools. - ATPG & Advanced Fault Models: Develop and optimize patterns for stuck-at, transition delay, cell-aware, and path-delay fault models; drive fault coverage closure and DRC-clean pattern delivery. - Simulation & Verification: Validate DFT logic correctness through gate-level simulation (VCS/Xcelium); resolve DFT rule violations and coverage gaps pre-tapeout. - Post-Silicon Bring-Up & Test: Lead DFT-related activities across CP / FT / HTOL / HVS -- test-mode validation, scan chain continuity, MBIST execution and repair verification. - Volume Diagnosis & Yield Ramp: Apply scan/ #LI-ML2

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Original posting: careers.mediatek.com

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RISC-V ecosystem

MediaTek Inc in the RISC-V ecosystem

RISC-V International: Strategic

We make semiconductor technology for #Smartphone, #IoT, #Network as well as TV, Tablet, Blu-ray & many other devices.

  • Named in coverage of RISE, the Linux Foundation Europe RISC-V Software Ecosystem project, and RISC-V edge-AI market analysis
  • Listed on the landscape as a RISC-V International member

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