Senior Lead analog post-silicon validation engineer
Overview
Skills named in this posting
- Ethernet
- Python
Job Qualification
• Bachelor’s or Master’s degree in Electronics Engineering.
• 8+ years of experience in analog bench validation and characterization.
• Strong understanding of analog circuit fundamentals, including DC power consumption, gain, settling time, temperature coefficients, and DAC/ADC INL/DNL.
• Experience in silicon validation of analog blocks such as BGR, temperature sensors, ADCs, DACs, LDOs, and IO circuits.
• Proficiency in bench automation techniques and tools such as MATLAB, Python, and LabVIEW.
• Hands‑on experience debugging bench setups and developing instrument drivers.
• Ability to interpret datasheets, prepare comprehensive test plans, and characterize devices across PVT (Process corners, Voltage and Temperature).
• Strong working knowledge of laboratory instruments including power supplies, DMMs, oscilloscopes, network analyzers, and spectrum analyzers.
• Familiarity with automated data processing, plotting, and PCB design.
• Experience in validating digital IP such as Ethernet, SGMII, and other high‑speed serial interfaces, as well as mixed‑signal IPs and SoC IOs (preferred).
• Experience in Automotive and Ethernet‑based systems is an added advantage.
• Excellent verbal and written communication skills.
Job responsibilities.
• Collaborate with the product definition and design teams prior to silicon availability to thoroughly understand validation requirements- covering device‑level, system‑level, and compliance specifications for Automotive Ethernet products.
• Define and own the validation plan and schedule, ensuring comprehensive coverage across all use cases and corner conditions.
• Develop efficient, reusable test methods and automation frameworks for validation setups.
• Design and implement test hardware and automated test solutions using NI LabVIEW, TestStand, Python, and VBA.
• Lead the development of scalable validation boards that meet stringent signal‑ and power‑integrity requirements.
• Perform parametric data collection across PVT corners using automation to execute the full validation plan.
• Drive reviews with extended teams for validation boards, test results, and debug activities, collaborating closely with cross‑functional groups.
• Work with cross‑functional teams (Systems, Applications, Test Engineering, Product Engineering, Quality) to support SoC/IP isue debugging, root‑cause analysis, and solution identification.
• Analyze correlation between lab evaluation results and ATE test results, and work closely with test engineers to ensure comprehensive and accurate product validation.
• Create validation plans based on product specifications and track progress through completion.
• Develop validation boards and automated IC characterization programs for the product.
• Debug post‑silicon test failures with strong expertise in systematic root‑cause analysis.
• The Analog Validation Engineer is responsible for assuring all instrumentation, scripting and boards are prepared prior to silicon arrival on the bench.
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RISC-V ecosystem
NXP Semiconductors Netherlands B.V. in the RISC-V ecosystem
RISC-V International: Strategic
NXP Semiconductors NV is American Dutch semiconductor manufacturer with dual headquarters in Eindhoven, Netherlands and Austin, Texas.
- NXP is putting RISC-V cores into its mainstream products: a Linux-capable RISC-V core was reported to debut on an NXP i.MX SoC
- Broad MCU/applications-processor vendor tracked in RISC-V market analyses alongside other incumbents
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