Hardware Verification Engineer 2 - Azure Core
Serbia, Belgrade, BelgradeRTL / HDLVerificationPosted Oct 9, 2026
Overview
- Added in 30 days
- 1,408
- At this company, still open
Skills named in this posting
- SystemVerilog
- UVM
Overview
Microsoft is building the fastest and most reliable networks for cloud computing and for emerging workloads such as Artificial Intelligence (AI)/Machine Learning (ML). Microsoft Azure is one of the largest public cloud platforms worldwide, providing a good channel for product impact that touches the lives of millions of users daily. Microsoft’s partnership with world leaders in AI technology provides unparalleled opportunities for innovation at the cutting edge of high-performance computing and networking. Our team has delivered Azure Boost and we are now looking for talented hardware verification engineers to join our team, developing Azure’s next generation networking devices.
Microsoft’s innovative approach for hardware/software co-design leverages flexibility and parallelism delivered by hardware to offload and accelerate many types of computations and functions of the Azure network. Our vertical work environment includes developing and deploying hardware, software drivers, and end to end features, and interaction with large software teams on important customer-facing applications. Come join us and be challenged daily as you build advanced hardware/software acceleration solutions for some of the world’s largest datacenter networks. This is an opportunity to join a team that has built some of the largest scale cloud systems ever deployed and learn from our team.
Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.
Responsibilities
• Own verification of one or more features of a custom block or subsystem integration
• Define and implement efficient UVM (Universal Verification Methodology)-based verification environments and use them to verify digital designs that are deployed in Microsoft’s cloud data centers
• Implement verification coverage metrics and leverage them to achieve 100% coverage
• Build and promote modern verification workflows, including AI-assisted techniques that improve verification environment development, automation, debug efficiency, coverage analysis, and execution quality
• Define verification plans, quality metrics, regression strategy and coverage goals aligned with project milestones
• Collaborate closely with architecture, design, system engineering and software partners to identify risks early, resolve complex issues, and deliver high-quality silicon subsystems
Qualifications
Required Qualifications:
• Master's Degree in Electrical Engineering, Computer Engineering, or related fieldOR Bachelor's Degree in Electrical Engineering, Computer Engineering, or related field AND some technical engineering experienceOR equivalent experience
Other Requirements:
• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings:Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
Preferred Qualifications:
• Doctorate in Electrical Engineering, Computer Engineering, or related fieldOR Master's Degree in Electrical Engineering, Computer Engineering, or related field AND some technical engineering experienceOR Bachelor's Degree in Electrical Engineering, Computer Engineering, or related field AND solid technical engineering experienceOR equivalent experience
• Proficiency in SystemVerilog-based verification environments and methodologies such as UVM, assertions, constrained-random verification, and coverage-driven verification
• Proven experience in verifying digital designs
• Ability to precisely articulate end goals and trade-offs when faced with ill-defined engineering challenges
• Experience applying AI-assisted techniques to improve silicon design or verification productivity, debug, coverage, automation, or workflow efficiency
#azurecorejobs
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.
Apply on the employer's site
Original posting: apply.careers.microsoft.com
RISC-V ecosystem
Microsoft Corporation in the RISC-V ecosystem
RISC-V International: Premier Board
The Microsoft Corporation is a publicly owned American software corporation headquartered in Redmond, Washington.
- .NET runtime landed initial RISC-V support
- Microsoft research/engineering on CHERIoT-Ibex (formally verified CHERI extension of the RISC-V Ibex core); publishes on RISC-V for Java/.NET
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