SoC Front-End Integrator, Senior to Staff (Hsinchu, Taipei)

Company: Qualcomm Semiconductor Limited Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a forward-thinking technology company, Qualcomm advances the limits of innovation in "Industrial and Embedded IoT" to deliver next-generation experiences and accelerate digital transformation toward a smarter, more seamlessly connected world. We are seeking a seasoned SoC Front-End Integrator to join our SoC design team. In this role, you will be responsible for integration of RTL/IP blocks and ensuring efficient communication across internal modules within complex SoC platforms. The position emphasizes chip-level interconnect, subsystem integration, and interface consistency, ensuring robust functionality, timing closure, and seamless collaboration between different design teams.Responsibilities • Integrate RTL and internal IP blocks into SoC designs • Ensure efficient communication and data flow between internal subsystems (e.g., CPU, memory, interconnect, peripherals) • Handle bus/interconnect design (AXI, AHB, APB) and optimize subsystem connectivity • Manage clock/reset domain crossing (CDC/RDC) to ensure reliable synchronization • Collaborate with verification teams to validate subsystem interactions and coverage • Work with physical design teams to achieve timing closure and integration readiness • Debug and resolve integration issues across simulation, emulation, and silicon validation • Support system-level bring-up and performance correlation in post-silicon validation • Drive methodology improvements and automation for SoC integration flow • Provide guidance on interface protocols, integration best practices, and coding styles • Occasional business travel across APAC and other regions may be requiredMinimum Qualifications • Master’s degree in Electrical Engineering, Computer Engineering, or related field • 5+ years of hands-on experience in SoC front-end integration • Proficiency in Verilog/SystemVerilog and SoC integration methodologies • Strong understanding of chip-level communication protocols and subsystem interaction • Familiarity with RTL-to-GDSII flow and timing closure • Strong scripting skills in Python, Tcl, or Shell • Excellent problem-solving and cross-functional communication skillsPreferred Qualifications • Experience with low-power design techniques and clock/power domain crossing • Knowledge of AMBA protocols (AXI, AHB, APB) and interconnect design • Familiarity with post-silicon validation and debug of subsystem communication • Exposure to EDA tools such as Synopsys Design Compiler, VCS, or Cadence tools • Comfortable working in a globally distributed engineering environment • Experience correlating pre-silicon verification with post-silicon performance/yield Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. 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