Staff Silicon Engineer

**Job Title** Staff Silicon Engineer **About Cognichip** - At Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. - Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines. **About the Role** - We are seeking a Staff Silicon Engineer who can combine strong software engineering, applied AI/ML, and semiconductor-domain understanding to build production-grade tools for chip design and verification. - In this role, you will help turn advanced research ideas into practical workflows used by engineers designing real silicon. - This work matters because chip design is becoming too complex for traditional workflows alone, and AI-native engineering systems can meaningfully change the speed, quality, and scale of semiconductor development. **Key Responsibilities** - Bridge Hardware and Software: Translate deep semiconductor domain expertise into robust software requirements and implementations. - Develop Agentic Data Pipelines: Architect and implement agentic workflows specifically designed to generate synthetic or augmented RTL and UVM code, creating essential datasets for training and fine-tuning advanced AI models. - Agentic Workflow Optimization: Fine-tune and optimize agentic workflow for domain-specific engineering tasks such as RTL generation, verification planning, and bug triage. - Infrastructure Development: Build and maintain high-performance simulation and testing infrastructure to validate AI-generated hardware designs. - Technical Leadership: Provide mentorship to junior engineers and lead cross-functional projects involving AI researchers and hardware architects. **Required Qualifications** - Experience: 8+ years of experience in silicon design, verification, or hardware-focused software development. - Semiconductor Domain: Deep understanding of the ASIC/FPGA design lifecycle in at least two of the three phases: RTL design (Verilog/SystemVerilog), UVM-based verification, and physical design flows. - EDA Tools: Experience with, and being a power user of, commercial EDA tools from major vendors (Cadence, Synopsys, Mentor/Siemens). - Software Proficiency: Strong programming skills in Python, C++, or similar languages, with experience in building scalable software systems. - AI/ML Knowledge: Practical experience with LLMs, prompt engineering, or machine learning frameworks (PyTorch/TensorFlow) applied to technical domains. - Education: MS or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field. **Preferred Qualifications** - Experience with LangSmith and LangGraph to build Agentic workflow.. - Background in computer architecture, specifically for AI accelerators or high-performance computing. - Contributions to open-source hardware or AI projects. **What It's Like Here** - We’re a fast-moving AI startup with a collaborative, high-trust culture. - We value technical excellence, ownership, and the freedom to experiment. - Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products. - We operate on a hybrid schedule with four days in office, one day remote. - If you’re excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you’ll feel right at home.