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Manager, DFT - Post Silicon

NVIDIA Corporation

Israel, Tel Aviv, Israel, YokneamRTL / HDLVerificationSoC / ASICPosted Aug 13, 2026
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Skills named in this posting

  • Verilog
  • UVM
We are looking for a Chip Design DFT/Post Silicon Manager to develop the next generation DFT technologies. As a Chip Design DFT/Post Silicon Manager in the DFT team at NVIDIA, you will lead team that transfer our DFT technologies to post-silicon in various projects and support the enablement. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals. What you’ll be doing: Define and develop characterization and validation techniques for post-silicon bring up and production test, spanning electrical, functional, and performance characterization. Working in close coordination with DFT and test engineering, yield, FW and other teams, lead methodology planning for future products and serve as the synchronization point between teams. Day to day, this means: • Driving alignment on tooling, flows, and coverage requirements ahead of tape-out and first silicon • Translating product requirements and silicon behavior into structured characterization plans with clear coverage targets, risk areas, and Product quality metrics (Test Time , Pattern count and so on). • Leading methodology transfer into execution — working with team managers to ensure tooling, methods, and engineers are in place for a smooth handoff • Identifying methodology gaps early in the program cycle and resolving them through cross-functional collaboration What we need to see: • B.Sc. in Electrical Engineering (or equivalent experience) • 8+ overall years of experience with DFT, IC silicon validation, product engineering, test engineering. • 2+ years of managerial experience. • Ability to work in a fast-paced, multifaceted work environment with a focus on technical excellence, innovative thinking, and strong analytical skills. • Ability to self-manage, show leadership, and possess good social skills. • Deep hands-on engineering background — this role leads, but is encouraged to be technically authoritative and roll up sleeves when needed. • Strong cross-functional communication skills; comfortable aligning with US-based teams across time zones and organizational boundaries. Ways to stand out from the crowd: • Experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy/VCS). • Experience with Specman/UVM is a plus. • Good understanding of RTL design (Verilog). • Product Engineering experince. NVIDIA has some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of developing the next generation technologies? If so, we want to hear from you. Come, join our DFT verification Team for a challenging and educational environment, where every individual has a significant contribution to our products and achievements!

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Original posting: jobs.nvidia.com

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RISC-V ecosystem

NVIDIA Corporation in the RISC-V ecosystem

RISC-V International: Premier Board

Founded in 1993, NVIDIA is an AI computing company. The company is headquartered in Santa Clara, California.

  • NVIDIA is bringing CUDA platform support to RISC-V, i.e. allowing a RISC-V CPU to host CUDA GPU applications
  • Publicly credited the RVA23 profile as the enabler: "We wouldn't have considered porting CUDA to RISC-V without it"
  • Active in RISC-V International profile/standards work and a frequent presence in RISC-V ecosystem coverage

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