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NPU Compiler Engineer

Advanced Micro Devices (AMD)

San Jose, CaliforniaRTL / HDLCompilersFull TimePosted Sep 22, 2026
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Skills named in this posting

  • C
  • C++
  • Python
  • MLIR
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. AMD has a broad portfolio of several ML accelerator devices with NPUs (neural processing units) that are integrated in its Client and Embedded product portfolio. The Vitis unified platform (Vitis Unified Software Platform) targets several AMD Embedded accelerator cards. The Ryzen AI software platform (Ryzen AI Software) targets several client CPU devices. Both these devices have NPUs that are based of AMD's proprietary AI-engine architecture. THE ROLE: AMD is looking for a specialized software engineer who is passionate about improving the performance of key applications and benchmarks. You will be a member of a core team of incredibly talented industry specialists and will work with the very latest hardware and software technology.  THE PERSON: The ideal candidate should be passionate about AI/ML engineering and possess a drive to solve sophisticated issues in a complex compiler tool stack. This role will be in software development, in the AI group in AMD. It will involve working on the next generation compiler tools to enhance the capabilities in Vitis-AI and Ryzen-AI software platforms, to compile Machine Learning networks in a broad scope, and cater to the cutting-edge AMD devices with AI-engines. KEY RESPONSIBILITIES: • Enhance, implement and design and implement compiler passes in MLIR framework for implementing and optimizing AI workloads on NPU. • Analyze and debug functional and performance issues. • Build infrastructure for analysis and debug of regression suites • Apply AI and coding agents to compiler development, debugging, test generation, and performance analysis. • Apply a data minded approach to target optimization efforts • Debugging/fix existing issues and research alternative, more efficient ways to accomplish the same work • Develop technical relationships with peers and partners PREFERRED EXPERIENCE: • Strong object-oriented programming background, C/C++ preferred • Deep hands-on experience with MLIR optimization and lowering passes • Strong knowledge of compiler architecture, intermediate representations, transformation passes, and optimization pipelines. • Strong understanding of NPU architecture, including parallel execution, memory hierarchy, caches, registers, synchronization, and occupancy. • Strong C++ and python skill • Experience with AI compilers, tensor or graph compilers, machine learning frameworks • Experience with debugging using SystemC and RTL simulators ACADEMIC CREDENTIALS: • Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent #LI-JG1 This role is not eligible for visa sponsorship. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. AMD has a broad portfolio of several ML accelerator devices with NPUs (neural processing units) that are integrated in its Client and Embedded product portfolio. The Vitis unified platform (Vitis Unified Software Platform) targets several AMD Embedded accelerator cards. The Ryzen AI software platform (Ryzen AI Software) targets several client CPU devices. Both these devices have NPUs that are based of AMD's proprietary AI-engine architecture. THE ROLE: AMD is looking for a specialized software engineer who is passionate about improving the performance of key applications and benchmarks. You will be a member of a core team of incredibly talented industry specialists and will work with the very latest hardware and software technology.  THE PERSON: The ideal candidate should be passionate about AI/ML engineering and possess a drive to solve sophisticated issues in a complex compiler tool stack. This role will be in software development, in the AI group in AMD. It will involve working on the next generation compiler tools to enhance the capabilities in Vitis-AI and Ryzen-AI software platforms, to compile Machine Learning networks in a broad scope, and cater to the cutting-edge AMD devices with AI-engines. KEY RESPONSIBILITIES: • Enhance, implement and design and implement compiler passes in MLIR framework for implementing and optimizing AI workloads on NPU. • Analyze and debug functional and performance issues. • Build infrastructure for analysis and debug of regression suites • Apply AI and coding agents to compiler development, debugging, test generation, and performance analysis. • Apply a data minded approach to target optimization efforts • Debugging/fix existing issues and research alternative, more efficient ways to accomplish the same work • Develop technical relationships with peers and partners PREFERRED EXPERIENCE: • Strong object-oriented programming background, C/C++ preferred • Deep hands-on experience with MLIR optimization and lowering passes • Strong knowledge of compiler architecture, intermediate representations, transformation passes, and optimization pipelines. • Strong understanding of NPU architecture, including parallel execution, memory hierarchy, caches, registers, synchronization, and occupancy. • Strong C++ and python skill • Experience with AI compilers, tensor or graph compilers, machine learning frameworks • Experience with debugging using SystemC and RTL simulators ACADEMIC CREDENTIALS: • Bachelor’s or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent #LI-JG1 This role is not eligible for visa sponsorship. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

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Original posting: careers.amd.com

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RISC-V ecosystem

Advanced Micro Devices (AMD) in the RISC-V ecosystem

RISC-V International: Strategic

For more than 45 years AMD has driven innovation in high-performance computing, graphics, and visualization technologies; the building blocks for gaming, immersive platforms, and the data center.

  • Ships MicroBlaze V, a RISC-V soft-processor core for AMD FPGAs/adaptive SoCs (docs, Vitis quick-start guide, BSP macros)
  • amd.com states AMD has been a RISC-V member since 2020
  • ROCm/LLVM docs include a RISC-V code-generation target; RISC-V debug support in AMD tools

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