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Deep Learning Performance Intern - 2027

NVIDIA Corporation

China, ShanghaiKernel / LinuxPosted Oct 12, 2026
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NVIDIA is developing processor and system architectures that accelerate deep learning on edge devices, workstations, and data center GPUs for a variety of applications including automotive, robotics, large language models and AI generative models. We are looking for an expert deep learning system performance architect to join our deep learning modelling, performance optimization, projections, and analysis effort. In this position, you will have the chance to optimize deep learning hardware and software architecture and make the significant impact in a dynamic technology focused company. What you’ll be doing: • Benchmark and analyze performance of various machine learning/deep learning algorithms on different GPU/NPU architectures • Develop performance models and provide performance projections for deep learning workloads on different architectures • Identify architecture, software and system performance bottlenecks and propose optimizations • Explore new features and hardware capabilities on deep learning applications What we need to see: • BSc. MS or PhD in relevant discipline (CS, EE, Math, etc.,) • Be familiar with GPU or Accelerator-based deep learning platform and software stack • A strong background in computer architecture • Be familiar with LLM or generative AI deep learning algorithms and kernel optimizations • Experience in system architecture design and performance optimization • Familiar with machine learning and deep learning frameworks

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Original posting: jobs.nvidia.com

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RISC-V ecosystem

NVIDIA Corporation in the RISC-V ecosystem

RISC-V International: Premier Board

Founded in 1993, NVIDIA is an AI computing company. The company is headquartered in Santa Clara, California.

  • NVIDIA is bringing CUDA platform support to RISC-V, i.e. allowing a RISC-V CPU to host CUDA GPU applications
  • Publicly credited the RVA23 profile as the enabler: "We wouldn't have considered porting CUDA to RISC-V without it"
  • Active in RISC-V International profile/standards work and a frequent presence in RISC-V ecosystem coverage

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