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Lead Software Engineer

Cadence Design Systems, Inc.

ZHUBEI 01Posted Oct 17, 2026
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Cadence Design Systems, Inc.
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Skills named in this posting

  • C++
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. • Develop PG solution in C++ for APD and Allegro, which includes but not limited to plane router, via placement and SI/PI aware routing. • Improve overall performance of PG solution. • Integrate PG solution with other APD functionalities like System design planar, signal router and SI/PI analysis tool. We’re doing work that matters. Help us solve what others can’t.

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Original posting: cadence.wd1.myworkdayjobs.com

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RISC-V ecosystem

Cadence Design Systems, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

Cadence is a leading provider of EDA and semiconductor IP.

  • EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
  • Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows

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