Digital IC Design Intern
Overview
- Added in 30 days
- 122
- At this company, still open
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The Power Design team is responsible for driving power efficiency throughout the chip design lifecycle, from early architecture and RTL through physical implementation and final signoff.
The team develops and owns the methodologies, tools, and flows used to estimate, analyze, track, and optimize chip power. We work closely with architecture, RTL, verification, and physical design teams to identify power challenges early, understand their root causes, and drive effective solutions while balancing power, performance, and area (PPA).
Our work includes developing power models and estimation capabilities, analyzing power at different stages of the design flow, identifying optimization opportunities, and driving improvements at both the RTL and physical design levels. The team also explores new automation and AI-based methodologies to make power analysis faster, more accurate, and more actionable.
As the chip’s power center of expertise, the team provides technical guidance, establishes best practices, tracks power targets, and drives power-related activities across the broader chip design organization.
What You Can Expect
Ramp up on chip power estimation methodologies, tools, and power calculators.
Perform power analysis and identify optimization opportunities throughout the chip design lifecycle.
Explore and implement power optimizations at both the RTL and physical design levels.
Develop automation and improve existing power analysis and estimation flows.
Explore the use of AI tools for power analysis, optimization, and design-flow automation.
Analyze power trends and identify high-impact areas for improvement.
Collaborate with RTL, physical design, architecture, and power teams to drive power-related activities.
Gradually become a power focal point within the chip design team, building expertise and ownership of power methodologies, analysis, and optimization.
What We're Looking For
To be successful in this role, you must:
- at least 2nd year student for Electrical Engineering, Computer Engineering, Computer Science, or similar field.
- Have coursework relating to foundational principles of circuit design, circuit theory, digital logic design, or electronics.
- Work well on a team and be prepared to share your knowledge with others.
- Be ready to take your work and any issues you faced or successes you had and develop that into a short PowerPoint presentation featuring key highlights to share with your team.
Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
#LI-NR1
Apply on the employer's site
Original posting: marvell.wd1.myworkdayjobs.com
RISC-V ecosystem
Marvell Asia PTE Ltd in the RISC-V ecosystem
RISC-V International: Strategic
Marvell Asia PTE Ltd
- RISC-V used in storage solutions (Forbes: "RISC-V and Marvell Technologies Advances Enable Storage Solutions")
- Marvell engineers publish RISC-V security research (survey on RISC-V hardware/architecture security)
Same employer
More roles at Marvell Asia PTE Ltd
Sr. Talent Advisor
Marvell Asia PTE Ltd
Pavia, ItalyVerificationFirmwarePhysical designNov 12, 2026Supervisor, Global Trade Compliance
Marvell Asia PTE Ltd
BangaloreNov 12, 2026Senior/Staff Engineer- ESD Design
Marvell Asia PTE Ltd
BangaloreVerificationPhysical designSoC / ASICNov 12, 2026Staff CAD Flow and Methodology
Marvell Asia PTE Ltd
Toronto, CanadaPhysical designNov 12, 2026Principal Engineer, ATE Test Engineering - Customer Engineering Solutions
Marvell Asia PTE Ltd
Irvine, CANov 12, 2026Cost Accounting Analyst, Professional II
Marvell Asia PTE Ltd
SingaporeNov 11, 2026