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Principal Design Engineer

Cadence Design Systems, Inc.

BANGALOREVerificationPosted Sep 21, 2026
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Skills named in this posting

  • UVM
  • Formal verification
  • PCIe
  • CXL
  • Ethernet
  • USB
  • I2C / UART
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage • The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. • Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. • The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success • Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests • You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day. Job responsibilities: BE/BTECH/ME/MTECH Design Verification role for IP development team. • Position is based in Bangalore/Noida, part of Cadence IP Group. Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C) • UVM testbench development to build a robust, scalable and efficient testbench to verify the design IPs. • In addition to UVM functional verification, role could involve Formal verification of complex design modules. • In addition to UVM functional verification, role could involve participating in Emulation qualification of design IPs. • Understand design and produce detailed verification strategy and test plan. Self-starter and learner with passion for getting the job done on time with great quality. • Strong problem solving, analytical and debug skills • Excellent verbal and written communications skills Clearly communicate project status, issues etc. We’re doing work that matters. Help us solve what others can’t.

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Original posting: cadence.wd1.myworkdayjobs.com

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RISC-V ecosystem

Cadence Design Systems, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

Cadence is a leading provider of EDA and semiconductor IP.

  • EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
  • Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows

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